2 * drivers/video/tegra/dc/edid.c
4 * Copyright (C) 2010 Google, Inc.
5 * Author: Erik Gilling <konkers@android.com>
7 * Copyright (c) 2010-2015, NVIDIA CORPORATION, All rights reserved.
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
21 #include <linux/debugfs.h>
23 #include <linux/i2c.h>
24 #include <linux/module.h>
25 #include <linux/seq_file.h>
26 #include <linux/vmalloc.h>
27 #include <linux/delay.h>
32 struct tegra_edid_pvt {
34 struct tegra_edid_hdmi_eld eld;
36 bool support_underscan;
44 u16 max_tmds_char_rate_hf_mhz;
45 u16 max_tmds_char_rate_hllc_mhz;
47 /* Note: dc_edid must remain the last member */
48 struct tegra_dc_edid dc_edid;
52 static char tegra_edid_dump_buff[16 * 1024];
54 static void tegra_edid_dump(struct tegra_edid *edid)
60 memset(&s, 0x0, sizeof(s));
62 s.buf = tegra_edid_dump_buff;
63 s.size = sizeof(tegra_edid_dump_buff);
66 tegra_edid_show(&s, NULL);
69 while (i < s.count ) {
70 if ((s.count - i) > 256) {
73 printk("%s", s.buf + i);
76 printk("%s", s.buf + i);
82 static void tegra_edid_dump(struct tegra_edid *edid)
88 int tegra_edid_i2c_adap_change_rate(struct i2c_adapter *i2c_adap, int rate)
90 const int MIN_RATE = 5000, MAX_RATE = 4000000;
91 int err = 0, cur_rate = 0;
92 if (rate < MIN_RATE || rate > MAX_RATE) {
93 pr_warn("Cannot change the i2c_ddc rate, the rate:%d cannot"
94 "be below minimum rate:%d or above maximum rate:%d", rate, MIN_RATE, MAX_RATE);
99 cur_rate = i2c_get_adapter_bus_clk_rate(i2c_adap);
100 if (cur_rate == rate)
103 err = i2c_set_adapter_bus_clk_rate(i2c_adap, rate);
105 pr_warn("Could not change i2c_ddc sclk rate\n");
107 pr_warn("Switching i2c_ddc sclk rate: from %d, "
108 "to %d\n", cur_rate, rate);
110 pr_warn("ddc i2c adapter NULL\n");
116 static int tegra_edid_i2c_divide_rate(struct tegra_edid *edid)
118 struct i2c_adapter *i2c_adap = i2c_get_adapter(edid->dc->out->ddc_bus);
119 int new_rate = 0, old_rate = 0, err = 0;
122 old_rate = i2c_get_adapter_bus_clk_rate(i2c_adap);
123 new_rate = old_rate >> 1;
124 err = tegra_edid_i2c_adap_change_rate(i2c_adap, new_rate);
130 int tegra_edid_read_block(struct tegra_edid *edid, int block, u8 *data)
132 u8 block_buf[] = {block >> 1};
133 u8 cmd_buf[] = {(block & 0x1) * 128};
135 u8 last_checksum = 0;
136 size_t attempt_cnt = 0;
137 struct i2c_msg msg[] = {
168 int status = edid->i2c_ops.i2c_transfer(edid->dc, m, msg_len);
173 if (status != msg_len)
176 for (i = 0; i < 128; i++)
180 * It is completely possible that the sink that we are
181 * reading has a bad EDID checksum (specifically, some
182 * of the older TVs). These TVs have the modes, etc
183 * programmed in their EDID correctly, but just have
184 * a bad checksum. It then becomes hard to distinguish
185 * between an i2c failure vs bad EDID.
186 * To get around this, read the EDID multiple times.
187 * If the calculated checksum is the exact same
188 * multiple number of times, just print a
189 * warning and ignore.
192 if (attempt_cnt == 0)
193 last_checksum = checksum;
195 /* On different checksum remainder, lower i2c speed */
196 if (last_checksum != checksum) {
197 pr_warn("%s: checksum failed and did not match consecutive reads. Previous remainder was %u. New remainder is %u. Failed at attempt %zu\n",
198 __func__, last_checksum, checksum, attempt_cnt);
199 if (tegra_edid_i2c_divide_rate(edid)) {
200 pr_warn("Cannot halve i2c speed giving"
201 "up on trying to change the i2c speed for EDID read\n");
208 usleep_range(TEGRA_EDID_MIN_RETRY_DELAY_US, TEGRA_EDID_MAX_RETRY_DELAY_US);
210 } while (last_checksum != 0 && ++attempt_cnt < TEGRA_EDID_MAX_RETRY);
213 * Re-calculate the checksum since the standard EDID parser doesn't
214 * like the bad checksum
216 if (last_checksum != 0) {
219 for (i = 0; i < 127; i++)
222 checksum = (u8)(256 - checksum);
223 data[127] = checksum;
225 pr_warn("%s: remainder is %u for the last %d attempts. Assuming bad sink EDID and ignoring. New checksum is %u\n",
226 __func__, last_checksum, TEGRA_EDID_MAX_RETRY,
233 static int tegra_edid_parse_ext_block(const u8 *raw, int idx,
234 struct tegra_edid_pvt *edid)
241 bool basic_audio = false;
244 pr_err("%s: invalid argument\n", __func__);
249 /* If CEA 861 block get info for eld struct */
252 edid->eld.eld_ver = 0x02;
253 edid->eld.cea_edid_ver = ptr[1];
255 /* check for basic audio support in CEA 861 block */
256 if(raw[3] & (1<<6)) {
257 /* For basic audio, set spk_alloc to Left+Right.
258 * If there is a Speaker Alloc block this will
259 * get over written with that value */
261 edid->support_audio = 1;
266 edid->support_underscan = 1;
268 edid->support_underscan = 0;
272 while (ptr < &raw[idx]) {
276 /* HDMI Specification v1.4a, section 8.3.2:
277 * see Table 8-16 for HDMI VSDB format.
278 * data blocks have tags in top 3 bits:
279 * tag code 2: video data block
280 * tag code 3: vendor specific data block
282 code = (tmp >> 5) & 0x7;
284 case CEA_DATA_BLOCK_AUDIO:
286 int sad_n = edid->eld.sad_count * 3;
287 edid->eld.sad_count += len / 3;
288 pr_debug("%s: incrementing eld.sad_count by %d to %d\n",
289 __func__, len / 3, edid->eld.sad_count);
290 edid->eld.conn_type = 0x00;
291 edid->eld.support_hdcp = 0x00;
292 for (i = 0; (i < len) && (sad_n < ELD_MAX_SAD_BYTES);
294 edid->eld.sad[sad_n] = ptr[i + 1];
296 ptr += len; /* adding the header */
297 /* Got an audio data block so enable audio */
298 if (basic_audio == true)
299 edid->eld.spk_alloc = 1;
302 /* case 2 is commented out for now */
303 case CEA_DATA_BLOCK_VENDOR:
307 /* OUI for hdmi licensing, LLC */
308 if ((ptr[1] == 0x03) &&
311 edid->eld.port_id[0] = ptr[4];
312 edid->eld.port_id[1] = ptr[5];
315 edid->max_tmds_char_rate_hllc_mhz =
317 edid->max_tmds_char_rate_hllc_mhz =
318 edid->max_tmds_char_rate_hllc_mhz ? :
319 165; /* for <=165MHz field may be 0 */
322 /* OUI for hdmi forum */
323 if ((ptr[1] == 0xd8) &&
326 edid->hfvsdb_present = true;
327 edid->color_depth_flag = ptr[7] &
329 edid->max_tmds_char_rate_hf_mhz = ptr[5] * 5;
330 edid->scdc_present = (ptr[6] >> 7) & 0x1;
339 /* HDMI_Video_present? */
341 /* Latency_Fields_present? */
344 /* I_Latency_Fields_present? */
348 if (j <= len && (ptr[j] & 0x80))
349 edid->support_stereo = 1;
351 if (++j <= len && (ptr[j] & 0xe0)) {
353 edid->hdmi_vic_len = ptr[j] >> 5;
354 for (k = 0; k < edid->hdmi_vic_len; k++)
355 edid->hdmi_vic[k] = ptr[j+k+1];
364 edid->eld.support_ai = (ptr[6] & 0x80);
372 edid->eld.aud_synch_delay = ptr[10];
375 ptr += len; /* adding the header */
378 case CEA_DATA_BLOCK_SPEAKER_ALLOC:
380 edid->eld.spk_alloc = ptr[1];
382 ptr += len; /* adding the header */
385 case CEA_DATA_BLOCK_EXT:
390 case CEA_DATA_BLOCK_EXT_Y420VDB: /* fall through */
391 case CEA_DATA_BLOCK_EXT_Y420CMDB:
392 edid->db420_present = true;
394 case CEA_DATA_BLOCK_EXT_CDB:
395 edid->colorimetry = ptr[2];
404 len++; /* len does not include header */
413 static int tegra_edid_mode_support_stereo(struct fb_videomode *mode)
418 if (mode->xres == 1280 &&
420 ((mode->refresh == 60) || (mode->refresh == 50)))
423 if (mode->xres == 1920 && mode->yres == 1080 && mode->refresh == 24)
429 static void data_release(struct kref *ref)
431 struct tegra_edid_pvt *data =
432 container_of(ref, struct tegra_edid_pvt, refcnt);
436 u16 tegra_edid_get_cd_flag(struct tegra_edid *edid)
438 if (!edid || !edid->data) {
439 pr_warn("edid invalid\n");
443 return edid->data->color_depth_flag;
446 /* hdmi spec mandates sink to specify correct max_tmds_clk only for >165MHz */
447 u16 tegra_edid_get_max_clk_rate(struct tegra_edid *edid)
449 u16 tmds_hf, tmds_llc;
451 if (!edid || !edid->data) {
452 pr_warn("edid invalid\n");
456 tmds_hf = edid->data->max_tmds_char_rate_hf_mhz;
457 tmds_llc = edid->data->max_tmds_char_rate_hllc_mhz;
459 if (tmds_hf || tmds_llc)
460 return tmds_hf ? : tmds_llc;
465 bool tegra_edid_is_scdc_present(struct tegra_edid *edid)
467 if (!edid || !edid->data) {
468 pr_warn("edid invalid\n");
472 if (edid->data->scdc_present &&
473 !tegra_edid_is_hfvsdb_present(edid)) {
474 pr_warn("scdc presence incorrectly parsed\n");
478 return edid->data->scdc_present;
481 bool tegra_edid_is_hfvsdb_present(struct tegra_edid *edid)
483 if (!edid || !edid->data) {
484 pr_warn("edid invalid\n");
488 return edid->data->hfvsdb_present;
491 bool tegra_edid_is_420db_present(struct tegra_edid *edid)
493 if (!edid || !edid->data) {
494 pr_warn("edid invalid\n");
498 return edid->data->db420_present;
501 u16 tegra_edid_get_ex_colorimetry(struct tegra_edid *edid)
503 if (!edid || !edid->data) {
504 pr_warn("edid invalid\n");
508 return edid->data->colorimetry;
511 int tegra_edid_get_monspecs(struct tegra_edid *edid, struct fb_monspecs *specs)
516 int extension_blocks;
517 struct tegra_edid_pvt *new_data, *old_data;
521 memset(specs, 0x0, sizeof(struct fb_monspecs));
522 new_data = vzalloc(SZ_32K + sizeof(struct tegra_edid_pvt));
526 kref_init(&new_data->refcnt);
528 data = new_data->dc_edid.buf;
530 if (edid->dc->vedid) {
531 memcpy(data, edid->dc->vedid_data, 128);
532 /* checksum new edid */
533 for (i = 0; i < 128; i++)
536 pr_err("%s: checksum failed\n", __func__);
541 ret = tegra_edid_read_block(edid, 0, data);
546 memset(&new_data->eld, 0x0, sizeof(new_data->eld));
547 fb_edid_to_monspecs(data, specs);
548 if (specs->modedb == NULL) {
552 memcpy(new_data->eld.monitor_name, specs->monitor, sizeof(specs->monitor));
553 new_data->eld.mnl = strlen(new_data->eld.monitor_name) + 1;
554 new_data->eld.product_id[0] = data[0x8];
555 new_data->eld.product_id[1] = data[0x9];
556 new_data->eld.manufacture_id[0] = data[0xA];
557 new_data->eld.manufacture_id[1] = data[0xB];
559 extension_blocks = data[0x7e];
561 for (i = 1; i <= extension_blocks; i++) {
562 if (edid->dc->vedid) {
563 memcpy(data + i * 128,
564 edid->dc->vedid_data + i * 128, 128);
565 for (j = 0; j < 128; j++)
566 checksum += data[i * 128 + j];
568 pr_err("%s: checksum failed\n", __func__);
573 ret = tegra_edid_read_block(edid, i, data + i * 128);
578 if (data[i * 128] == 0x2) {
579 fb_edid_add_monspecs(data + i * 128, specs);
581 tegra_edid_parse_ext_block(data + i * 128,
582 data[i * 128 + 2], new_data);
584 if (new_data->support_stereo) {
585 for (j = 0; j < specs->modedb_len; j++) {
586 if (tegra_edid_mode_support_stereo(
588 specs->modedb[j].vmode |=
589 #ifndef CONFIG_TEGRA_HDMI_74MHZ_LIMIT
590 FB_VMODE_STEREO_FRAME_PACK;
592 FB_VMODE_STEREO_LEFT_RIGHT;
597 if (new_data->hdmi_vic_len > 0) {
599 int l = specs->modedb_len;
600 struct fb_videomode *m;
601 m = kzalloc((specs->modedb_len +
602 new_data->hdmi_vic_len) *
603 sizeof(struct fb_videomode), GFP_KERNEL);
606 memcpy(m, specs->modedb, specs->modedb_len *
607 sizeof(struct fb_videomode));
608 for (k = 0; k < new_data->hdmi_vic_len; k++) {
609 unsigned vic = new_data->hdmi_vic[k];
610 if (vic >= HDMI_EXT_MODEDB_SIZE) {
611 pr_warning("Unsupported HDMI VIC %d, ignoring\n", vic);
614 memcpy(&m[l], &hdmi_ext_modes[vic],
618 kfree(specs->modedb);
620 specs->modedb_len = specs->modedb_len +
621 new_data->hdmi_vic_len;
626 new_data->dc_edid.len = i * 128;
628 mutex_lock(&edid->lock);
629 old_data = edid->data;
630 edid->data = new_data;
631 mutex_unlock(&edid->lock);
634 kref_put(&old_data->refcnt, data_release);
636 tegra_edid_dump(edid);
644 int tegra_edid_audio_supported(struct tegra_edid *edid)
646 if ((!edid) || (!edid->data))
649 return edid->data->support_audio;
652 int tegra_edid_underscan_supported(struct tegra_edid *edid)
654 if ((!edid) || (!edid->data))
657 return edid->data->support_underscan;
660 int tegra_edid_get_eld(struct tegra_edid *edid, struct tegra_edid_hdmi_eld *elddata)
662 if (!elddata || !edid->data)
665 memcpy(elddata,&edid->data->eld,sizeof(struct tegra_edid_hdmi_eld));
670 struct tegra_edid *tegra_edid_create(struct tegra_dc *dc,
671 i2c_transfer_func_t i2c_func)
673 struct tegra_edid *edid;
675 edid = kzalloc(sizeof(struct tegra_edid), GFP_KERNEL);
677 return ERR_PTR(-ENOMEM);
679 mutex_init(&edid->lock);
680 edid->i2c_ops.i2c_transfer = i2c_func;
686 void tegra_edid_destroy(struct tegra_edid *edid)
689 kref_put(&edid->data->refcnt, data_release);
693 struct tegra_dc_edid *tegra_edid_get_data(struct tegra_edid *edid)
695 struct tegra_edid_pvt *data;
697 mutex_lock(&edid->lock);
700 kref_get(&data->refcnt);
701 mutex_unlock(&edid->lock);
703 return data ? &data->dc_edid : NULL;
706 void tegra_edid_put_data(struct tegra_dc_edid *data)
708 struct tegra_edid_pvt *pvt;
713 pvt = container_of(data, struct tegra_edid_pvt, dc_edid);
715 kref_put(&pvt->refcnt, data_release);
718 int tegra_dc_edid_blob(struct tegra_dc *dc, struct i2c_msg *msgs, int num)
720 struct i2c_msg *pmsg;
724 struct device_node *np_panel = NULL;
726 np_panel = tegra_get_panel_node_out_type_check(dc,
727 dc->pdata->default_out->type);
729 if (!np_panel || !of_device_is_available(np_panel))
732 for (i = 0; i < num; ++i) {
735 if (pmsg->flags & I2C_M_RD) { /* Read */
737 status = of_property_read_u8_array(np_panel,
738 "nvidia,edid", pmsg->buf, len);
741 dev_err(&dc->ndev->dev,
742 "Failed to read EDID blob from DT"
743 " addr:%d, size:%d\n",
749 of_node_put(np_panel);
753 struct tegra_dc_edid *tegra_dc_get_edid(struct tegra_dc *dc)
756 return ERR_PTR(-ENODEV);
758 return tegra_edid_get_data(dc->edid);
760 EXPORT_SYMBOL(tegra_dc_get_edid);
762 void tegra_dc_put_edid(struct tegra_dc_edid *edid)
764 tegra_edid_put_data(edid);
766 EXPORT_SYMBOL(tegra_dc_put_edid);
768 static const struct i2c_device_id tegra_edid_id[] = {
773 MODULE_DEVICE_TABLE(i2c, tegra_edid_id);
775 static struct i2c_driver tegra_edid_driver = {
776 .id_table = tegra_edid_id,
778 .name = "tegra_edid",
782 static int __init tegra_edid_init(void)
784 return i2c_add_driver(&tegra_edid_driver);
787 static void __exit tegra_edid_exit(void)
789 i2c_del_driver(&tegra_edid_driver);
792 module_init(tegra_edid_init);
793 module_exit(tegra_edid_exit);