2 * drivers/video/tegra/host/vi/vi.h
4 * Tegra Graphics Host VI
6 * Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 #ifndef __NVHOST_VI_H__
22 #define __NVHOST_VI_H__
24 #include <linux/platform/tegra/isomgr.h>
26 #include "../camera/mc_common.h"
27 #include "camera_priv_defs.h"
28 #include "chip_support.h"
30 #define VI_CFG_INTERRUPT_MASK_0 0x8c
31 #define VI_CFG_INTERRUPT_STATUS_0 0x98
33 #define CSI_CSI_PIXEL_PARSER_A_INTERRUPT_MASK_0 0x850
34 #define CSI_CSI_PIXEL_PARSER_A_STATUS_0 0x854
35 #define PPA_FIFO_OVRF (1 << 5)
37 #define CSI_CSI_PIXEL_PARSER_B_INTERRUPT_MASK_0 0x884
38 #define CSI_CSI_PIXEL_PARSER_B_STATUS_0 0x888
39 #define PPB_FIFO_OVRF (1 << 5)
41 #define VI_CSI_0_ERROR_STATUS 0x184
42 #define VI_CSI_1_ERROR_STATUS 0x284
43 #define VI_CSI_0_WD_CTRL 0x18c
44 #define VI_CSI_1_WD_CTRL 0x28c
45 #define VI_CSI_0_ERROR_INT_MASK_0 0x188
46 #define VI_CSI_1_ERROR_INT_MASK_0 0x288
48 #ifdef TEGRA_21X_OR_HIGHER_CONFIG
49 #define VI_CSI_2_ERROR_STATUS 0x384
50 #define VI_CSI_3_ERROR_STATUS 0x484
51 #define VI_CSI_2_WD_CTRL 0x38c
52 #define VI_CSI_3_WD_CTRL 0x48c
53 #define VI_CSI_2_ERROR_INT_MASK_0 0x388
54 #define VI_CSI_3_ERROR_INT_MASK_0 0x488
55 #define VI_CSI_4_ERROR_STATUS 0x584
56 #define VI_CSI_5_ERROR_STATUS 0x684
57 #define VI_CSI_4_WD_CTRL 0x58c
58 #define VI_CSI_5_WD_CTRL 0x68c
59 #define VI_CSI_4_ERROR_INT_MASK_0 0x588
60 #define VI_CSI_5_ERROR_INT_MASK_0 0x688
64 #define CSI1_CSI_PIXEL_PARSER_A_INTERRUPT_MASK_0 0x1050
65 #define CSI1_CSI_PIXEL_PARSER_A_STATUS_0 0x1054
66 #define CSI1_CSI_PIXEL_PARSER_B_INTERRUPT_MASK_0 0x1084
67 #define CSI1_CSI_PIXEL_PARSER_B_STATUS_0 0x1088
68 #define CSI2_CSI_PIXEL_PARSER_A_INTERRUPT_MASK_0 0x1850
69 #define CSI2_CSI_PIXEL_PARSER_A_STATUS_0 0x1854
70 #define CSI2_CSI_PIXEL_PARSER_B_INTERRUPT_MASK_0 0x1884
71 #define CSI2_CSI_PIXEL_PARSER_B_STATUS_0 0x1888
73 #define NUM_VI_WATCHDOG 6
75 #define NUM_VI_WATCHDOG 2
78 typedef void (*callback)(void *);
80 struct tegra_vi_stats {
85 struct tegra_camera *camera;
86 struct platform_device *ndev;
88 struct nvhost_device_data *ndata;
89 struct tegra_mc_vi mc_vi;
90 struct tegra_csi_device csi;
92 struct regulator *reg;
93 struct dentry *debugdir;
94 struct tegra_vi_stats vi_out;
95 struct workqueue_struct *vi_workqueue;
96 struct work_struct stats_work;
97 struct work_struct mfi_cb_work;
98 #if defined(CONFIG_TEGRA_ISOMGR)
99 tegra_isomgr_handle isomgr_handle;
104 bool master_deinitialized;
107 extern const struct file_operations tegra_vi_ctrl_ops;
108 int nvhost_vi_prepare_poweroff(struct platform_device *);
109 int nvhost_vi_finalize_poweron(struct platform_device *);
111 void nvhost_vi_reset_all(struct platform_device *);
113 #ifdef CONFIG_VIDEO_TEGRA_VI
114 int tegra_vi_register_mfi_cb(callback cb, void *cb_arg);
115 int tegra_vi_unregister_mfi_cb(void);
117 static inline int tegra_vi_register_mfi_cb(callback cb, void *cb_arg)
121 static inline int tegra_vi_unregister_mfi_cb(void)