2 * CAN bus driver for the Freescale MPC5xxx embedded CPU.
4 * Copyright (C) 2004-2005 Andrey Volkov <avolkov@varma-el.com>,
6 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com>
7 * Copyright (C) 2009 Wolfram Sang, Pengutronix <w.sang@pengutronix.de>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the version 2 of the GNU General Public License
11 * as published by the Free Software Foundation
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/interrupt.h>
26 #include <linux/platform_device.h>
27 #include <linux/netdevice.h>
28 #include <socketcan/can.h>
29 #include <socketcan/can/dev.h>
30 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)
31 #include <linux/of_platform.h>
32 #include <sysdev/fsl_soc.h>
35 #include <asm/mpc52xx.h>
39 #include <socketcan/can/version.h> /* for RCSID. Removed by mkpatch script */
40 RCSID("$Id: mpc52xx_can.c 1038 2009-08-21 10:00:21Z hartkopp $");
42 #define DRV_NAME "mpc5xxx_can"
44 struct mpc5xxx_can_data {
46 u32 (*get_clock)(struct of_device *ofdev, const char *clock_name,
50 #ifdef CONFIG_PPC_MPC5200
51 static struct of_device_id __devinitdata mpc52xx_cdm_ids[] = {
52 { .compatible = "fsl,mpc5200-cdm", },
56 static u32 __devinit mpc52xx_can_get_clock(struct of_device *ofdev,
57 const char *clock_name,
61 struct mpc52xx_cdm __iomem *cdm;
62 struct device_node *np_cdm;
66 pvr = mfspr(SPRN_PVR);
69 * Either the oscillator clock (SYS_XTAL_IN) or the IP bus clock
70 * (IP_CLK) can be selected as MSCAN clock source. According to
71 * the MPC5200 user's manual, the oscillator clock is the better
72 * choice as it has less jitter. For this reason, it is selected
73 * by default. Unfortunately, it can not be selected for the old
74 * MPC5200 Rev. A chips due to a hardware bug (check errata).
76 if (clock_name && strcmp(clock_name, "ip") == 0)
77 *mscan_clksrc = MSCAN_CLKSRC_BUS;
79 *mscan_clksrc = MSCAN_CLKSRC_XTAL;
81 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,31)
82 freq = mpc52xx_find_ipb_freq(ofdev->node);
84 freq = mpc5xxx_get_bus_frequency(ofdev->node);
89 if (*mscan_clksrc == MSCAN_CLKSRC_BUS || pvr == 0x80822011)
92 /* Determine SYS_XTAL_IN frequency from the clock domain settings */
93 np_cdm = of_find_matching_node(NULL, mpc52xx_cdm_ids);
95 dev_err(&of->dev, "can't get clock node!\n");
98 cdm = of_iomap(np_cdm, 0);
100 if (in_8(&cdm->ipb_clk_sel) & 0x1)
102 val = in_be32(&cdm->rstcfg);
104 freq *= (val & (1 << 5)) ? 8 : 4;
105 freq /= (val & (1 << 6)) ? 12 : 16;
112 #else /* !CONFIG_PPC_MPC5200 */
113 static u32 __devinit mpc52xx_can_get_clock(struct of_device *ofdev,
114 const char *clock_name,
119 #endif /* CONFIG_PPC_MPC5200 */
121 #ifdef CONFIG_PPC_MPC512x
122 struct mpc512x_clockctl {
123 u32 spmr; /* System PLL Mode Reg */
124 u32 sccr[2]; /* System Clk Ctrl Reg 1 & 2 */
125 u32 scfr1; /* System Clk Freq Reg 1 */
126 u32 scfr2; /* System Clk Freq Reg 2 */
128 u32 bcr; /* Bread Crumb Reg */
129 u32 pccr[12]; /* PSC Clk Ctrl Reg 0-11 */
130 u32 spccr; /* SPDIF Clk Ctrl Reg */
131 u32 cccr; /* CFM Clk Ctrl Reg */
132 u32 dccr; /* DIU Clk Cnfg Reg */
133 u32 mccr[4]; /* MSCAN Clk Ctrl Reg 1-3 */
136 static struct of_device_id __devinitdata mpc512x_clock_ids[] = {
137 { .compatible = "fsl,mpc5121-clock", },
141 static u32 __devinit mpc512x_can_get_clock(struct of_device *ofdev,
142 const char *clock_name,
145 struct mpc512x_clockctl __iomem *clockctl;
146 struct device_node *np_clock;
147 struct clk *sys_clk, *ref_clk;
148 int plen, clockidx, clocksrc = -1;
149 u32 sys_freq, val, clockdiv = 1, freq = 0;
152 np_clock = of_find_matching_node(NULL, mpc512x_clock_ids);
154 dev_err(&ofdev->dev, "couldn't find clock node\n");
157 clockctl = of_iomap(np_clock, 0);
159 dev_err(&ofdev->dev, "couldn't map clock registers\n");
163 /* Determine the MSCAN device index from the physical address */
164 pval = of_get_property(ofdev->node, "reg", &plen);
165 BUG_ON(!pval || plen < sizeof(*pval));
166 clockidx = (*pval & 0x80) ? 1 : 0;
171 * Clock source and divider selection: 3 different clock sources
172 * can be selected: "ip", "ref" or "sys". For the latter two, a
173 * clock divider can be defined as well. If the clock source is
174 * not specified by the device tree, we first try to find an
175 * optimal CAN source clock based on the system clock. If that
176 * is not posslible, the reference clock will be used.
178 if (clock_name && !strcmp(clock_name, "ip")) {
179 *mscan_clksrc = MSCAN_CLKSRC_IPS;
180 freq = mpc5xxx_get_bus_frequency(ofdev->node);
182 *mscan_clksrc = MSCAN_CLKSRC_BUS;
184 pval = of_get_property(ofdev->node,
185 "fsl,mscan-clock-divider", &plen);
186 if (pval && plen == sizeof(*pval))
191 if (!clock_name || !strcmp(clock_name, "sys")) {
192 sys_clk = clk_get(&ofdev->dev, "sys_clk");
194 dev_err(&ofdev->dev, "couldn't get sys_clk\n");
197 /* Get and round up/down sys clock rate */
199 ((clk_get_rate(sys_clk) + 499999) / 1000000);
202 /* A multiple of 16 MHz would be optimal */
203 if ((sys_freq % 16000000) == 0) {
205 clockdiv = sys_freq / 16000000;
206 freq = sys_freq / clockdiv;
210 freq = sys_freq / clockdiv;
215 ref_clk = clk_get(&ofdev->dev, "ref_clk");
217 dev_err(&ofdev->dev, "couldn't get ref_clk\n");
221 freq = clk_get_rate(ref_clk) / clockdiv;
226 out_be32(&clockctl->mccr[clockidx], 0x0);
228 /* Set source and divider */
229 val = (clocksrc << 14) | ((clockdiv - 1) << 17);
230 out_be32(&clockctl->mccr[clockidx], val);
232 out_be32(&clockctl->mccr[clockidx], val | 0x10000);
235 /* Enable MSCAN clock domain */
236 val = in_be32(&clockctl->sccr[1]);
237 if (!(val & (1 << 25)))
238 out_be32(&clockctl->sccr[1], val | (1 << 25));
240 dev_dbg(&ofdev->dev, "using '%s' with frequency divider %d\n",
241 *mscan_clksrc == MSCAN_CLKSRC_IPS ? "ips_clk" :
242 clocksrc == 1 ? "ref_clk" : "sys_clk", clockdiv);
245 of_node_put(np_clock);
250 #else /* !CONFIG_PPC_MPC512x */
251 static u32 __devinit mpc512x_can_get_clock(struct of_device *ofdev,
252 const char *clock_name,
257 #endif /* CONFIG_PPC_MPC512x */
259 static int __devinit mpc5xxx_can_probe(struct of_device *ofdev,
260 const struct of_device_id *id)
262 struct mpc5xxx_can_data *data = (struct mpc5xxx_can_data *)id->data;
263 struct device_node *np = ofdev->node;
264 struct net_device *dev;
265 struct mscan_priv *priv;
267 const char *clock_name = NULL;
268 int irq, mscan_clksrc = 0;
271 base = of_iomap(np, 0);
273 dev_err(&ofdev->dev, "couldn't ioremap\n");
277 irq = irq_of_parse_and_map(np, 0);
279 dev_err(&ofdev->dev, "no irq found\n");
284 dev = alloc_mscandev();
286 goto exit_dispose_irq;
288 priv = netdev_priv(dev);
289 priv->reg_base = base;
292 clock_name = of_get_property(np, "fsl,mscan-clock-source", NULL);
295 priv->type = data->type;
296 priv->can.clock.freq = data->get_clock(ofdev, clock_name,
298 if (!priv->can.clock.freq) {
299 dev_err(&ofdev->dev, "couldn't get MSCAN clock properties\n");
300 goto exit_free_mscan;
303 SET_NETDEV_DEV(dev, &ofdev->dev);
305 err = register_mscandev(dev, mscan_clksrc);
307 dev_err(&ofdev->dev, "registering %s failed (err=%d)\n",
309 goto exit_free_mscan;
312 dev_set_drvdata(&ofdev->dev, dev);
314 dev_info(&ofdev->dev, "MSCAN at 0x%p, irq %d, clock %d Hz\n",
315 priv->reg_base, dev->irq, priv->can.clock.freq);
322 irq_dispose_mapping(irq);
329 static int __devexit mpc5xxx_can_remove(struct of_device *ofdev)
331 struct net_device *dev = dev_get_drvdata(&ofdev->dev);
332 struct mscan_priv *priv = netdev_priv(dev);
334 dev_set_drvdata(&ofdev->dev, NULL);
336 unregister_mscandev(dev);
337 iounmap(priv->reg_base);
338 irq_dispose_mapping(dev->irq);
345 static struct mscan_regs saved_regs;
346 static int mpc5xxx_can_suspend(struct of_device *ofdev, pm_message_t state)
348 struct net_device *dev = dev_get_drvdata(&ofdev->dev);
349 struct mscan_priv *priv = netdev_priv(dev);
350 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
352 _memcpy_fromio(&saved_regs, regs, sizeof(*regs));
357 static int mpc5xxx_can_resume(struct of_device *ofdev)
359 struct net_device *dev = dev_get_drvdata(&ofdev->dev);
360 struct mscan_priv *priv = netdev_priv(dev);
361 struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base;
363 regs->canctl0 |= MSCAN_INITRQ;
364 while (!(regs->canctl1 & MSCAN_INITAK))
367 regs->canctl1 = saved_regs.canctl1;
368 regs->canbtr0 = saved_regs.canbtr0;
369 regs->canbtr1 = saved_regs.canbtr1;
370 regs->canidac = saved_regs.canidac;
372 /* restore masks, buffers etc. */
373 _memcpy_toio(®s->canidar1_0, (void *)&saved_regs.canidar1_0,
374 sizeof(*regs) - offsetof(struct mscan_regs, canidar1_0));
376 regs->canctl0 &= ~MSCAN_INITRQ;
377 regs->cantbsel = saved_regs.cantbsel;
378 regs->canrier = saved_regs.canrier;
379 regs->cantier = saved_regs.cantier;
380 regs->canctl0 = saved_regs.canctl0;
386 static struct mpc5xxx_can_data __devinitdata mpc5200_can_data = {
387 .type = MSCAN_TYPE_MPC5200,
388 .get_clock = mpc52xx_can_get_clock,
391 static struct mpc5xxx_can_data __devinitdata mpc5121_can_data = {
392 .type = MSCAN_TYPE_MPC5121,
393 .get_clock = mpc512x_can_get_clock,
396 static struct of_device_id __devinitdata mpc5xxx_can_table[] = {
397 { .compatible = "fsl,mpc5200-mscan", .data = &mpc5200_can_data, },
398 /* Note that only MPC5121 Rev. 2 (and later) is supported */
399 { .compatible = "fsl,mpc5121-mscan", .data = &mpc5121_can_data, },
403 static struct of_platform_driver mpc5xxx_can_driver = {
404 .owner = THIS_MODULE,
405 .name = "mpc5xxx_can",
406 .probe = mpc5xxx_can_probe,
407 .remove = __devexit_p(mpc5xxx_can_remove),
409 .suspend = mpc5xxx_can_suspend,
410 .resume = mpc5xxx_can_resume,
412 .match_table = mpc5xxx_can_table,
415 static int __init mpc5xxx_can_init(void)
417 return of_register_platform_driver(&mpc5xxx_can_driver);
419 module_init(mpc5xxx_can_init);
421 static void __exit mpc5xxx_can_exit(void)
423 return of_unregister_platform_driver(&mpc5xxx_can_driver);
425 module_exit(mpc5xxx_can_exit);
427 MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
428 MODULE_DESCRIPTION("Freescale MPC5xxx CAN driver");
429 MODULE_LICENSE("GPL v2");