2 * @brief DMM Driver Implementation File
8 /* (c) Texas Instruments 2009-2012, All rights reserved. */
10 /* USER CODE BEGIN (0) */
13 #include "sys/ti_drv_dmm.h"
15 /* USER CODE BEGIN (1) */
18 /** @fn void dmmInit(void)
19 * @brief Initializes the DMM Driver
21 * This function initializes the DMM module.
24 /* ***************************************************** */
25 /* Modify only by hand -- do not use Halcogen! */
26 /* ***************************************************** */
29 /** - DMM pins default output value
32 dmmREG->PC3 = 0 /* DMM SYNC - FAN_CONTROL*/
33 | (0 << 1) /* DMM CLK - ETH_RESET */
34 | (0 << 2) /* DMM DATA[0] - VBAT_1_EN */
35 | (0 << 3) /* DMM DATA[1] - VBAT_2_EN */
36 | (0 << 4) /* DMM DATA[2] - VBAT_3_EN */
37 | (0 << 5) /* DMM DATA[3] - VBAT_EN */
38 | (0 << 6) /* DMM DATA[4] - NOT USED */
39 | (0 << 7) /* DMM DATA[5] - SPICSA */
40 | (0 << 8) /* DMM DATA[6] - SPICSB */
41 | (0 << 9) /* DMM DATA[7] - NOT USED */
42 | (0 << 10) /* DMM DATA[8] - NOT USED */
43 | (1 << 11) /* DMM DATA[9] - MOUT1_EN */
44 | (1 << 12) /* DMM DATA[10] - MOUT2_EN */
45 | (1 << 13) /* DMM DATA[11] - CAN_NSTB */
46 | (0 << 14) /* DMM DATA[12] - NOT USED */
47 | (0 << 15) /* DMM DATA[13] - CAN_EN */
48 | (1 << 16) /* DMM DATA[14] - LIN2_NSLP */
49 | (1 << 17) /* DMM DATA[15] - LIN1_NSLP */
50 | (0 << 18); /* DMM ENA - DIN_INT */
52 /** - DMM pins direction
53 * 1 - Output, 0 - Input
55 dmmREG->PC1 = 1 /* DMM SYNC - FAN_CONTROL*/
56 | (1 << 1) /* DMM CLK - ETH_RESET */
57 | (1 << 2) /* DMM DATA[0] - VBAT_1_EN */
58 | (1 << 3) /* DMM DATA[1] - VBAT_2_EN */
59 | (1 << 4) /* DMM DATA[2] - VBAT_3_EN */
60 | (1 << 5) /* DMM DATA[3] - VBAT_EN */
61 | (1 << 6) /* DMM DATA[4] - NOT USED */
62 | (1 << 7) /* DMM DATA[5] - SPICSA */
63 | (1 << 8) /* DMM DATA[6] - SPICSB */
64 | (1 << 9) /* DMM DATA[7] - NOT USED */
65 | (1 << 10) /* DMM DATA[8] - NOT USED */
66 | (0 << 11) /* DMM DATA[9] - MOUT1_EN */
67 | (0 << 12) /* DMM DATA[10] - MOUT2_EN */
68 | (1 << 13) /* DMM DATA[11] - CAN_NSTB */
69 | (1 << 14) /* DMM DATA[12] - NOT USED */
70 | (1 << 15) /* DMM DATA[13] - CAN_EN */
71 | (1 << 16) /* DMM DATA[14] - LIN2_NSLP */
72 | (1 << 17) /* DMM DATA[15] - LIN1_NSLP */
73 | (1 << 18); /* DMM ENA - DIN_INT */
75 /** - DMM pins open drain enable
76 * 1 - Enabled, 0 - Disabled
78 dmmREG->PC6 = 0 /* DMM SYNC - FAN_CONTROL*/
79 | (0 << 1) /* DMM CLK - ETH_RESET */
80 | (0 << 2) /* DMM DATA[0] - VBAT_1_EN */
81 | (0 << 3) /* DMM DATA[1] - VBAT_2_EN */
82 | (0 << 4) /* DMM DATA[2] - VBAT_3_EN */
83 | (0 << 5) /* DMM DATA[3] - VBAT_EN */
84 | (0 << 6) /* DMM DATA[4] - NOT USED */
85 | (0 << 7) /* DMM DATA[5] - SPICSA */
86 | (0 << 8) /* DMM DATA[6] - SPICSB */
87 | (0 << 9) /* DMM DATA[7] - NOT USED */
88 | (0 << 10) /* DMM DATA[8] - NOT USED */
89 | (1 << 11) /* DMM DATA[9] - MOUT1_EN */
90 | (1 << 12) /* DMM DATA[10] - MOUT2_EN */
91 | (0 << 13) /* DMM DATA[11] - CAN_NSTB */
92 | (0 << 14) /* DMM DATA[12] - NOT USED */
93 | (0 << 15) /* DMM DATA[13] - CAN_EN */
94 | (0 << 16) /* DMM DATA[14] - LIN2_NSLP */
95 | (0 << 17) /* DMM DATA[15] - LIN1_NSLP */
96 | (0 << 18); /* DMM ENA - DIN_INT */
99 /** - DMM pins pull type selection
100 * 1 - Pull-up, 0 - Pull-down
102 dmmREG->PC8 = 0 /* DMM SYNC - FAN_CONTROL*/
103 | (0 << 1) /* DMM CLK - ETH_RESET */
104 | (0 << 2) /* DMM DATA[0] - VBAT_1_EN */
105 | (0 << 3) /* DMM DATA[1] - VBAT_2_EN */
106 | (0 << 4) /* DMM DATA[2] - VBAT_3_EN */
107 | (0 << 5) /* DMM DATA[3] - VBAT_EN */
108 | (0 << 6) /* DMM DATA[4] - NOT USED */
109 | (0 << 7) /* DMM DATA[5] - SPICSA */
110 | (0 << 8) /* DMM DATA[6] - SPICSB */
111 | (0 << 9) /* DMM DATA[7] - NOT USED */
112 | (0 << 10) /* DMM DATA[8] - NOT USED */
113 | (1 << 11) /* DMM DATA[9] - MOUT1_EN */
114 | (1 << 12) /* DMM DATA[10] - MOUT2_EN */
115 | (0 << 13) /* DMM DATA[11] - CAN_NSTB */
116 | (0 << 14) /* DMM DATA[12] - NOT USED */
117 | (0 << 15) /* DMM DATA[13] - CAN_EN */
118 | (0 << 16) /* DMM DATA[14] - LIN2_NSLP */
119 | (0 << 17) /* DMM DATA[15] - LIN1_NSLP */
120 | (0 << 18); /* DMM ENA - DIN_INT */
123 /** - DMM pins pull resistor enable
124 * 1 - Enabled, 0 - Disabled
126 dmmREG->PC7 = 1 /* DMM SYNC - FAN_CONTROL*/
127 | (1 << 1) /* DMM CLK - ETH_RESET */
128 | (1 << 2) /* DMM DATA[0] - VBAT_1_EN */
129 | (1 << 3) /* DMM DATA[1] - VBAT_2_EN */
130 | (1 << 4) /* DMM DATA[2] - VBAT_3_EN */
131 | (1 << 5) /* DMM DATA[3] - VBAT_EN */
132 | (1 << 6) /* DMM DATA[4] - NOT USED */
133 | (1 << 7) /* DMM DATA[5] - SPICSA */
134 | (1 << 8) /* DMM DATA[6] - SPICSB */
135 | (1 << 9) /* DMM DATA[7] - NOT USED */
136 | (1 << 10) /* DMM DATA[8] - NOT USED */
137 | (0 << 11) /* DMM DATA[9] - MOUT1_EN */
138 | (0 << 12) /* DMM DATA[10] - MOUT2_EN */
139 | (1 << 13) /* DMM DATA[11] - CAN_NSTB */
140 | (1 << 14) /* DMM DATA[12] - NOT USED */
141 | (1 << 15) /* DMM DATA[13] - CAN_EN */
142 | (1 << 16) /* DMM DATA[14] - LIN2_NSLP */
143 | (1 << 17) /* DMM DATA[15] - LIN1_NSLP */
144 | (1 << 18); /* DMM ENA - DIN_INT */
146 /** - DMM pins type selection
147 * 1 - Pin is functional, 0 - Pin is GPIO
149 dmmREG->PC0 = 0 /* DMM SYNC - FAN_CONTROL*/
150 | (0 << 1) /* DMM CLK - ETH_RESET */
151 | (0 << 2) /* DMM DATA[0] - VBAT_1_EN */
152 | (0 << 3) /* DMM DATA[1] - VBAT_2_EN */
153 | (0 << 4) /* DMM DATA[2] - VBAT_3_EN */
154 | (0 << 5) /* DMM DATA[3] - VBAT_EN */
155 | (0 << 6) /* DMM DATA[4] - NOT USED */
156 | (0 << 7) /* DMM DATA[5] - SPICSA */
157 | (0 << 8) /* DMM DATA[6] - SPICSB */
158 | (0 << 9) /* DMM DATA[7] - NOT USED */
159 | (0 << 10) /* DMM DATA[8] - NOT USED */
160 | (0 << 11) /* DMM DATA[9] - MOUT1_EN */
161 | (0 << 12) /* DMM DATA[10] - MOUT2_EN */
162 | (0 << 13) /* DMM DATA[11] - CAN_NSTB */
163 | (0 << 14) /* DMM DATA[12] - NOT USED */
164 | (0 << 15) /* DMM DATA[13] - CAN_EN */
165 | (0 << 16) /* DMM DATA[14] - LIN2_NSLP */
166 | (0 << 17) /* DMM DATA[15] - LIN1_NSLP */
167 | (0 << 18); /* DMM ENA - DIN_INT */