2 * @brief SCI Driver Definition File
8 /* (c) Texas Instruments 2009-2012, All rights reserved. */
15 #include "sys/ti_drv_gio.h"
19 * @brief Interrupt Flag Definitions
21 * Used with sciEnableNotification, sciDisableNotification
25 SCI_FE_INT = 0x04000000, /* framming error */
26 SCI_OE_INT = 0x02000000, /* overrun error */
27 SCI_PE_INT = 0x01000000, /* parity error */
28 SCI_RX_INT = 0x00000200, /* receive buffer ready */
29 SCI_TX_INT = 0x00000100, /* transmit buffer ready */
30 SCI_WAKE_INT = 0x00000002, /* wakeup */
31 SCI_BREAK_INT = 0x00000001 /* break detect */
36 * @brief SCI Register Definition
38 * This structure is used to access the SCI module egisters.
40 /** @typedef sciBASE_t
41 * @brief SCI Register Frame Type Definition
43 * This type is used to access the SCI Registers.
53 * @brief SCI Base Register Definition
55 * This structure is used to access the SCI module egisters.
57 /** @typedef sciBASE_t
58 * @brief SCI Register Frame Type Definition
60 * This type is used to access the SCI Registers.
62 typedef volatile struct sciBase
64 uint32_t GCR0; /**< 0x0000 Global Control Register 0 */
65 uint32_t GCR1; /**< 0x0004 Global Control Register 1 */
66 uint32_t GCR2; /**< 0x0008 Global Control Register 2 */
67 uint32_t SETINT; /**< 0x000C Set Interrupt Enable Register */
68 uint32_t CLRINT; /**< 0x0010 Clear Interrupt Enable Register */
69 uint32_t SETINTLVL; /**< 0x0014 Set Interrupt Level Register */
70 uint32_t CLRINTLVL; /**< 0x0018 Set Interrupt Level Register */
71 uint32_t FLR; /**< 0x001C Interrupt Flag Register */
72 uint32_t INTVECT0; /**< 0x0020 Interrupt Vector Offset 0 */
73 uint32_t INTVECT1; /**< 0x0024 Interrupt Vector Offset 1 */
74 uint32_t LENGTH; /**< 0x0028 Format Control Register */
75 uint32_t BAUD; /**< 0x002C Baud Rate Selection Register */
76 #if ((__little_endian__ == 1) || (__LITTLE_ENDIAN__ == 1))
77 uint8_t ED; /**< 0x0033 Emulation Register */
79 uint8_t RD; /**< 0x0037 Receive Data Buffer */
81 uint8_t TD; /**< 0x003B Transmit Data Buffer */
85 uint8_t ED; /**< 0x0033 Emulation Register */
87 uint8_t RD; /**< 0x0037 Receive Data Buffer */
89 uint8_t TD; /**< 0x003B Transmit Data Buffer */
91 uint32_t FUN; /**< 0x003C Pin Function Register */
92 uint32_t DIR; /**< 0x0040 Pin Direction Register */
93 uint32_t DIN; /**< 0x0044 Pin Data In Register */
94 uint32_t DOUT; /**< 0x0048 Pin Data Out Register */
95 uint32_t SET; /**< 0x004C Pin Data Set Register */
96 uint32_t CLR; /**< 0x0050 Pin Data Clr Register */
97 uint32_t ODR; /**< 0x0054: Pin Open Drain Output Enable Register */
98 uint32_t PD; /**< 0x0058: Pin Pullup/Pulldown Disable Register */
99 uint32_t PSL; /**< 0x005C: Pin Pullup/Pulldown Selection Register */
100 uint32_t : 32U; /**< 0x060: Reserved */
101 uint32_t : 32U; /**< 0x064: Reserved */
102 uint32_t : 32U; /**< 0x068: Reserved */
103 uint32_t : 32U; /**< 0x06C: Reserved */
104 uint32_t : 32U; /**< 0x070: Reserved */
105 uint32_t : 32U; /**< 0x074: Reserved */
106 uint32_t : 32U; /**< 0x078: Reserved */
107 uint32_t : 32U; /**< 0x07C: Reserved */
108 uint32_t : 32U; /**< 0x080: Reserved */
109 uint32_t : 32U; /**< 0x084: Reserved */
110 uint32_t : 32U; /**< 0x088: Reserved */
111 uint32_t : 32U; /**< 0x08C: Reserved */
112 uint32_t IODFTCTRL; /**< 0x0090: I/O Error Enable Register */
117 * @brief Register Frame Pointer
119 * This pointer is used by the SCI driver to access the sci module registers.
121 #define sciREG ((sciBASE_t *)0xFFF7E500U)
125 * @brief SCI GIO Port Register Pointer
127 * Pointer used by the GIO driver to access I/O PORT of SCI
128 * (use the GIO drivers to access the port pins).
130 #define sciPORT ((gioPORT_t *)0xFFF7E540U)
134 * @brief SCILIN (LIN - Compatibility Mode) Register Frame Pointer
136 * This pointer is used by the SCI driver to access the sci module registers.
138 #define scilinREG ((sciBASE_t *)0xFFF7E400U)
142 * @brief SCILIN (LIN - Compatibility Mode) Register Frame Pointer
144 * Pointer used by the GIO driver to access I/O PORT of LIN
145 * (use the GIO drivers to access the port pins).
147 #define scilinPORT ((gioPORT_t *)0xFFF7E440U)
150 /* SCI Interface Functions */
152 void sciSetFunctional(sciBASE_t *sci, uint32_t port);
153 void sciSetBaudrate(sciBASE_t *sci, uint32_t baud);
154 int sciIsTxReady(sciBASE_t *sci);
155 //void sciSendByte(sciBASE_t *sci, uint8_t byte);
156 //void sciSend(sciBASE_t *sci, uint32_t length, uint8_t *data);
157 int sciIsRxReady(sciBASE_t *sci);
158 int sciRxError(sciBASE_t *sci);
159 int sciReceiveByte(sciBASE_t *sci);
160 void sciReceive(sciBASE_t *sci, uint32_t length, uint8_t *data);
161 void sciEnableNotification(sciBASE_t *sci, uint32_t flags);
162 void sciDisableNotification(sciBASE_t *sci, uint32_t flags);
163 void sciEnableLoopback(sciBASE_t *sci, Loopbacktype_t Loopbacktype);
164 void sciDisableLoopback(sciBASE_t *sci);
166 /** @fn void sciNotification(sciBASE_t *sci, uint32_t flags)
167 * @brief Interrupt callback
168 * @param[in] sci - sci module base address
169 * @param[in] flags - copy of error interrupt flags
171 * This is a callback that is provided by the application and is called apon
172 * an interrupt. The parameter passed to the callback is a copy of the
173 * interrupt flag register.
175 void sciNotification(sciBASE_t *sci, uint32_t flags);
178 /** Flag for transfer in progress */
179 #define BUF_TRANSFER_IN_PROGRESS 1
181 /** Struct to represent IO buffer for SCI */
183 xQueueHandle buf; /* Ring buffer (FreeRTOS queue) */
184 xSemaphoreHandle mutex; /* Mutex to allow speaking only one device at time */
185 uint8_t flags; /* Flags */