int j;
/* Deactivate reset pin of PHY */
- #define DMM_CLK 1
dmmREG->PC4 = (1 << DMM_CLK); /* Set to H */
dummy_wait();
dmmREG->PC5 = (1 << DMM_CLK); /* Set to L */
dummy_wait();
dmmREG->PC4 = (1 << DMM_CLK); /* Set to H */
dummy_wait();
-/*
- gioSetBit(dmmPORT, DMM_CLK, 0);
- dummy_wait();
- gioSetBit(dmmPORT, DMM_CLK, 1);
- dummy_wait();
-*/
/* Prepare RX Packet buffer descriptor */
rx_desc->pBuffer = rx_buff;
void PHY_partner_ability_get(unsigned int mdioBaseAddr, unsigned int phyAddr, unsigned short *data)
{
- int ret;
- //do {
- ret = MDIOPhyRegRead(mdioBaseAddr, phyAddr, PHY_ANAR, data);
- //} while (ret == FALSE);
+ MDIOPhyRegRead(mdioBaseAddr, phyAddr, PHY_ANAR, data);
}
void PHY_configure(unsigned int mdioBaseAddr, unsigned int phyAddr)