]> rtime.felk.cvut.cz Git - pes-rpp/rpp-test-sw.git/commitdiff
section definition file added
authorMichal Horn <michal@michal-laptop.(none)>
Tue, 18 Jun 2013 08:49:28 +0000 (10:49 +0200)
committerMichal Horn <michal@michal-laptop.(none)>
Tue, 18 Jun 2013 08:49:28 +0000 (10:49 +0200)
Without this file code was loaded into some random memory position and MPU could not find reset vector.

rpp/lib/rpp/TMS570LS313xFlashLnk.cmd [new file with mode: 0644]

diff --git a/rpp/lib/rpp/TMS570LS313xFlashLnk.cmd b/rpp/lib/rpp/TMS570LS313xFlashLnk.cmd
new file mode 100644 (file)
index 0000000..a2ffb5c
--- /dev/null
@@ -0,0 +1,42 @@
+/*----------------------------------------------------------------------------*/
+/* TMS570LS313xFlashLnk.cmd                                                   */
+/* <ccsroot>/ccs_base/arm/include/TMS570LS313xFlashLnk.cmd                    */
+/*                                                                            */
+/* (c) Texas Instruments 2011, All rights reserved.                           */
+/*                                                                            */
+
+/*
+ *  Alternative memory map found in generated HalCoGen file:
+ *
+ *   STACKS  (RW) : origin=0x08000000 length=0x00001500
+ *   RAM     (RW) : origin=0x08001500 length=0x00026B00
+ */
+
+
+/*----------------------------------------------------------------------------*/
+/* Linker Settings                                                            */
+--retain="*(.intvecs)"
+
+/*----------------------------------------------------------------------------*/
+/* Memory Map                                                                 */
+MEMORY{
+    VECTORS (X)  : origin=0x00000000 length=0x00000020
+    FLASH0  (RX) : origin=0x00000020 length=0x0017FFE0
+    FLASH1  (RX) : origin=0x00180000 length=0x00180000
+    STACKS  (RW) : origin=0x08000000 length=0x00001300
+    RAM     (RW) : origin=0x08001300 length=0x0003ED00
+}
+
+/*----------------------------------------------------------------------------*/
+/* Section Configuration                                                      */
+SECTIONS{
+    .intvecs : {} > VECTORS
+    .text    : {} > FLASH0 | FLASH1
+    .const   : {} > FLASH0 | FLASH1
+    .cinit   : {} > FLASH0 | FLASH1
+    .pinit   : {} > FLASH0 | FLASH1
+    .bss     : {} > RAM
+    .data    : {} > RAM
+    .stack   : {} > STACKS
+}
+/*----------------------------------------------------------------------------*/