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#include "sys/_tms570_hydctr/sys_pinmux.h"
#define PINMUX_SET(REG, BALLID, MUX) \
#include "sys/_tms570_hydctr/sys_pinmux.h"
#define PINMUX_SET(REG, BALLID, MUX) \
- pinMuxReg->PINMUX##REG = (pinMuxReg->PINMUX##REG & PINMUX_BALL_##BALLID##_MASK) | (PINMUX_BALL_##BALLID##_##MUX)
+ pinMuxReg->PINMMR##REG = (pinMuxReg->PINMMR##REG & PINMUX_BALL_##BALLID##_MASK) | (PINMUX_BALL_##BALLID##_##MUX)
#define PINMUX_GATE_EMIF_CLK_ENABLE \
#define PINMUX_GATE_EMIF_CLK_ENABLE \
- pinMuxReg->PINMUX29 = (pinMuxReg->PINMUX29 & PINMUX_GATE_EMIF_CLK_MASK) | PINMUX_GATE_EMIF_CLK
+ pinMuxReg->PINMMR29 = (pinMuxReg->PINMMR29 & PINMUX_GATE_EMIF_CLK_MASK) | PINMUX_GATE_EMIF_CLK
#define PINMUX_GIOB_DISABLE_HET2_ENABLE(state) \
#define PINMUX_GIOB_DISABLE_HET2_ENABLE(state) \
- (pinMuxReg->PINMUX29 = (pinMuxReg->PINMUX29 & PINMUX_GIOB_DISABLE_HET2_MASK) | (PINMUX_GIOB_DISABLE_HET2_##state))
+ (pinMuxReg->PINMMR29 = (pinMuxReg->PINMMR29 & PINMUX_GIOB_DISABLE_HET2_MASK) | (PINMUX_GIOB_DISABLE_HET2_##state))
#define PINMUX_ALT_ADC_TRIGGER_SELECT(num) \
#define PINMUX_ALT_ADC_TRIGGER_SELECT(num) \
- pinMuxReg->PINMUX30 = (pinMuxReg->PINMUX30 & PINMUX_ALT_ADC_TRIGGER_MASK) | (PINMUX_ALT_ADC_TRIGGER_##num)
+ pinMuxReg->PINMMR30 = (pinMuxReg->PINMMR30 & PINMUX_ALT_ADC_TRIGGER_MASK) | (PINMUX_ALT_ADC_TRIGGER_##num)
#define PINMUX_ETHERNET_SELECT(interface) \
#define PINMUX_ETHERNET_SELECT(interface) \
- pinMuxReg->PINMUX29 = (pinMuxReg->PINMUX29 & PINMUX_ETHERNET_MASK) | (PINMUX_ETHERNET_##interface)
+ pinMuxReg->PINMMR29 = (pinMuxReg->PINMMR29 & PINMUX_ETHERNET_MASK) | (PINMUX_ETHERNET_##interface)
kickerReg->KICKER0 = 0x83E70B13;
kickerReg->KICKER1 = 0x95A4F1E0;
kickerReg->KICKER0 = 0x83E70B13;
kickerReg->KICKER1 = 0x95A4F1E0;
- pinMuxReg->PINMUX0 = PINMUX_BALL_C3_I2C_SCL | PINMUX_BALL_B2_I2C_SDA;
+ pinMuxReg->PINMMR0 = PINMUX_BALL_C3_I2C_SCL | PINMUX_BALL_B2_I2C_SDA;
- pinMuxReg->PINMUX1 = PINMUX_BALL_E3_MIBSPI3NCS_4;
+ pinMuxReg->PINMMR1 = PINMUX_BALL_E3_MIBSPI3NCS_4;
- pinMuxReg->PINMUX2 = PINMUX_BALL_C1_GIOA_2 | PINMUX_BALL_E1_GIOA_3 | (1 << 26) /* EPWM1A */;
+ pinMuxReg->PINMMR2 = PINMUX_BALL_C1_GIOA_2 | PINMUX_BALL_E1_GIOA_3 | (1 << 26) /* EPWM1A */;
- pinMuxReg->PINMUX3 = (1 << 19) /* EPWM1B */;
+ pinMuxReg->PINMMR3 = (1 << 19) /* EPWM1B */;
- pinMuxReg->PINMUX4 = (1 << 2) /* EPWM2A */ | PINMUX_BALL_V2_HET1_01 | PINMUX_BALL_U1_HET1_03;
+ pinMuxReg->PINMMR4 = (1 << 2) /* EPWM2A */ | PINMUX_BALL_V2_HET1_01 | PINMUX_BALL_U1_HET1_03;
- pinMuxReg->PINMUX5 = (1 << 2) /* EPWM2B */ | (1 << 10) /* EPWM3A */ | (1 << 19) /* EPWM3B */;
+ pinMuxReg->PINMMR5 = (1 << 2) /* EPWM2B */ | (1 << 10) /* EPWM3A */ | (1 << 19) /* EPWM3B */;
- pinMuxReg->PINMUX6 = (1 << 4) /* EPWM7B */ | PINMUX_BALL_P5_EMIF_DATA_11 | (1 << 20) /* EPWM7A */;
+ pinMuxReg->PINMMR6 = (1 << 4) /* EPWM7B */ | PINMUX_BALL_P5_EMIF_DATA_11 | (1 << 20) /* EPWM7A */;
- pinMuxReg->PINMUX7 = (1 << 18) /* EPWM5A */ | PINMUX_BALL_V5_MIBSPI3NCS_1;
+ pinMuxReg->PINMMR7 = (1 << 18) /* EPWM5A */ | PINMUX_BALL_V5_MIBSPI3NCS_1;
- pinMuxReg->PINMUX8 = PINMUX_BALL_G3_MIBSPI1NCS_2 | (1 << 18) /* ECAP1 */ | (1 << 2) /* EPWM5B */;
+ pinMuxReg->PINMMR8 = PINMUX_BALL_G3_MIBSPI1NCS_2 | (1 << 18) /* ECAP1 */ | (1 << 2) /* EPWM5B */;
- pinMuxReg->PINMUX9 = PINMUX_BALL_J3_MIBSPI1NCS_3 | PINMUX_BALL_W9_MIBSPI3NCS_5 | PINMUX_BALL_V10_MIBSPI3NCS_0;
+ pinMuxReg->PINMMR9 = PINMUX_BALL_J3_MIBSPI1NCS_3 | PINMUX_BALL_W9_MIBSPI3NCS_5 | PINMUX_BALL_V10_MIBSPI3NCS_0;
- pinMuxReg->PINMUX10 = PINMUX_BALL_N19_AD1EVT | PINMUX_BALL_N17_EMIF_nCS_0;
+ pinMuxReg->PINMMR10 = PINMUX_BALL_N19_AD1EVT | PINMUX_BALL_N17_EMIF_nCS_0;
- pinMuxReg->PINMUX11 = PINMUX_BALL_K17_EMIF_nCS_3 | PINMUX_BALL_P1_HET1_24;
+ pinMuxReg->PINMMR11 = PINMUX_BALL_K17_EMIF_nCS_3 | PINMUX_BALL_P1_HET1_24;
- pinMuxReg->PINMUX12 = PINMUX_BALL_A14_HET1_26 | (0x1 << 20) /* ECAP4 */ | (0x1 << 29) /* ECAP5 */;
+ pinMuxReg->PINMMR12 = PINMUX_BALL_A14_HET1_26 | (0x1 << 20) /* ECAP4 */ | (0x1 << 29) /* ECAP5 */;
- pinMuxReg->PINMUX13 = PINMUX_BALL_J18_MIBSPI5SOMI_0 | PINMUX_BALL_J19_MIBSPI5SIMO_0 | PINMUX_BALL_H19_MIBSPI5CLK | (0x1 << 28) /* ECAP6 */;
+ pinMuxReg->PINMMR13 = PINMUX_BALL_J18_MIBSPI5SOMI_0 | PINMUX_BALL_J19_MIBSPI5SIMO_0 | PINMUX_BALL_H19_MIBSPI5CLK | (0x1 << 28) /* ECAP6 */;
- pinMuxReg->PINMUX14 = PINMUX_BALL_E18_HET1_08 | PINMUX_BALL_K19_HET1_28 | PINMUX_BALL_D17_EMIF_nWE | PINMUX_BALL_D16_EMIF_BA_1;
+ pinMuxReg->PINMMR14 = PINMUX_BALL_E18_HET1_08 | PINMUX_BALL_K19_HET1_28 | PINMUX_BALL_D17_EMIF_nWE | PINMUX_BALL_D16_EMIF_BA_1;
- pinMuxReg->PINMUX17 = PINMUX_BALL_D19_HET1_10 | PINMUX_BALL_B4_HET1_12;
+ pinMuxReg->PINMMR17 = PINMUX_BALL_D19_HET1_10 | PINMUX_BALL_B4_HET1_12;
- pinMuxReg->PINMUX19 = PINMUX_BALL_B11_HET1_30;
+ pinMuxReg->PINMMR19 = PINMUX_BALL_B11_HET1_30;
/* pin mutexed with N2HET1[17], which can (and by this implementation is) also be enabled on another ball
* through register PINMMR24[16].
/* pin mutexed with N2HET1[17], which can (and by this implementation is) also be enabled on another ball
* through register PINMMR24[16].
* On this ball there is a Sensor_Supply_1_En connected. To be able to enable the sensor, the HET pin has
* to be enabled on this ball and disabled on the other. But LED, connected to the other ball will not work.
*/
* On this ball there is a Sensor_Supply_1_En connected. To be able to enable the sensor, the HET pin has
* to be enabled on this ball and disabled on the other. But LED, connected to the other ball will not work.
*/
- pinMuxReg->PINMUX20 = PINMUX_BALL_F3_MIBSPI1NCS_1;
+ pinMuxReg->PINMMR20 = PINMUX_BALL_F3_MIBSPI1NCS_1;
- pinMuxReg->PINMUX21 = PINMUX_BALL_D5_EMIF_ADDR_1;
+ pinMuxReg->PINMMR21 = PINMUX_BALL_D5_EMIF_ADDR_1;
- pinMuxReg->PINMUX22 = PINMUX_BALL_D4_EMIF_ADDR_0 | PINMUX_BALL_C5_EMIF_ADDR_7 | PINMUX_BALL_C4_EMIF_ADDR_6 | (0x1 << 24) /* EMIF_ADDR_8 */;
+ pinMuxReg->PINMMR22 = PINMUX_BALL_D4_EMIF_ADDR_0 | PINMUX_BALL_C5_EMIF_ADDR_7 | PINMUX_BALL_C4_EMIF_ADDR_6 | (0x1 << 24) /* EMIF_ADDR_8 */;
- pinMuxReg->PINMUX23 = ((~(pinMuxReg->PINMUX5 >> 1U) & 0x00000001U ) << 8U) | ((~(pinMuxReg->PINMUX5 >> 9U) & 0x00000001U ) << 16U) | ((~(pinMuxReg->PINMUX5 >> 17U) & 0x00000001U ) << 24U) | PINMUX_BALL_C6_EMIF_ADDR_8;
+ pinMuxReg->PINMMR23 = ((~(pinMuxReg->PINMMR5 >> 1U) & 0x00000001U ) << 8U) | ((~(pinMuxReg->PINMMR5 >> 9U) & 0x00000001U ) << 16U) | ((~(pinMuxReg->PINMMR5 >> 17U) & 0x00000001U ) << 24U) | PINMUX_BALL_C6_EMIF_ADDR_8;
- pinMuxReg->PINMUX24 = ((~(pinMuxReg->PINMUX4 >> 17U) & 0x00000001U ) << 0U) | ((~(pinMuxReg->PINMUX4 >> 25U) & 0x00000001U ) << 8U) | PINMUX_BALL_A13_HET1_17 | PINMUX_BALL_B13_HET1_19;
+ pinMuxReg->PINMMR24 = ((~(pinMuxReg->PINMMR4 >> 17U) & 0x00000001U ) << 0U) | ((~(pinMuxReg->PINMMR4 >> 25U) & 0x00000001U ) << 8U) | PINMUX_BALL_A13_HET1_17 | PINMUX_BALL_B13_HET1_19;
- pinMuxReg->PINMUX25 = PINMUX_BALL_H4_HET1_21 | PINMUX_BALL_J4_HET1_23 | PINMUX_BALL_M3_HET1_25 | (1 << 24) /* N2HET1[27] */;
+ pinMuxReg->PINMMR25 = PINMUX_BALL_H4_HET1_21 | PINMUX_BALL_J4_HET1_23 | PINMUX_BALL_M3_HET1_25 | (1 << 24) /* N2HET1[27] */;
- pinMuxReg->PINMUX26 = PINMUX_BALL_A3_HET1_29 | PINMUX_BALL_J17_HET1_31;
+ pinMuxReg->PINMMR26 = PINMUX_BALL_A3_HET1_29 | PINMUX_BALL_J17_HET1_31;
- pinMuxReg->PINMUX27 = (1 << 2) /* EPWM4A */;
+ pinMuxReg->PINMMR27 = (1 << 2) /* EPWM4A */;
- pinMuxReg->PINMUX29 = PINMUX_BALL_D3_SPI2NENA | (1 << 16) /* GIOB[2] */;
+ pinMuxReg->PINMMR29 = PINMUX_BALL_D3_SPI2NENA | (1 << 16) /* GIOB[2] */;
- pinMuxReg->PINMUX33 = (1 << 1) /* EPWM4B */ | (1 << 8) /* MIBSPI3SOMI[0] */ | (1 << 16) /* MIBSPI3SIMO[0] */ | (1 << 24) /* MIBSPI3CLK */;
+ pinMuxReg->PINMMR33 = (1 << 1) /* EPWM4B */ | (1 << 8) /* MIBSPI3SOMI[0] */ | (1 << 16) /* MIBSPI3SIMO[0] */ | (1 << 24) /* MIBSPI3CLK */;
- pinMuxReg->PINMUX34 = (1 << 0) /* N2HET1[16] */ | (1 << 9) /* EPWM6A */ | (1 << 17) /* EPWM6B */;
+ pinMuxReg->PINMMR34 = (1 << 0) /* N2HET1[16] */ | (1 << 9) /* EPWM6A */ | (1 << 17) /* EPWM6B */;
PINMUX_GATE_EMIF_CLK_ENABLE;
PINMUX_GIOB_DISABLE_HET2_ENABLE(OFF);
PINMUX_GATE_EMIF_CLK_ENABLE;
PINMUX_GIOB_DISABLE_HET2_ENABLE(OFF);