return E_OK;
}
+/**
+ * @brief Switch POC to clear_message_ram state from default_config and config state
+ *
+ * Send command to POC to set all bits of message RAM to 0. Returns when cleaning is done,
+ * resulting in POC switch to origin state.
+ *
+ * @return E_OK: Call finished successfuly. E_NOT_OK: POC has not accepted command.
+ */
+Std_ReturnType Fr_POC_go_to_clear_rams() {
+ Fr_wait_for_POC_ready();
+ frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_CLEAR_RAMS;
+ if (frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 == CMD_command_not_accepted) {
+ return E_NOT_OK;
+ }
+ Fr_wait_for_POC_ready();
+ return E_OK;
+}
+
+/**
+ * @brief Switch POC to ready state from config state
+ *
+ * After command to switch into ready state is passed into CHI,
+ * the response is checked and if POC has reacted on the command,
+ * the function is waiting until POC is ready
+ *
+ * @return E_OK: Call finished successfuly. E_NOT_OK: POC has not accepted command.
+ */
+Std_ReturnType Fr_POC_go_to_ready() {
+ Fr_wait_for_POC_ready();
+ // For CHA and CHB network
+ if (frayREG->SUCC1_UN.SUCC1_ST.ccha_B1 && frayREG->SUCC1_UN.SUCC1_ST.cchb_B1){
+ // Unlock sequence
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
+ frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_READY;
+ // Unlock sequence
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
+ frayREG->SUCC1_UN.SUCC1_ST.mtsa_B1 = 1U;
+ // Unlock sequence
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
+ frayREG->SUCC1_UN.SUCC1_ST.mtsb_B1 = 1U;
+ }
+ // For CHA network
+ else if(frayREG->SUCC1_UN.SUCC1_ST.ccha_B1){
+ // Unlock sequence
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
+ frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_READY;
+ // Unlock sequence
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
+ frayREG->SUCC1_UN.SUCC1_ST.mtsa_B1 = 1U;
+ }
+ // For CHB network
+ else if (frayREG->SUCC1_UN.SUCC1_ST.cchb_B1){
+ // Unlock sequence
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
+ frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_READY;
+ // Unlock sequence
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0xCE;
+ frayREG->LCK_UN.LCK_ST.clk_B8 = 0x31;
+ frayREG->SUCC1_UN.SUCC1_ST.mtsb_B1 = 1U;
+ }
+ else frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 = CMD_READY;
+
+ if (frayREG->SUCC1_UN.SUCC1_ST.cmd_B4 == CMD_command_not_accepted)
+ return E_NOT_OK;
+
+ while ((frayREG->CCSV_UN.CCSV_UL & 0x0000003F) != 0x01)
+ ; // Waiting for READY state
+ return E_OK;
+}
+
/**
* @brief Copy cluster config parameters into FlexRay configuration registers.
*
return E_NOT_OK | errCode | FR_INIT_ERR_BUFFPARAM_CONFIG;
}
+ /* Clear message RAM */
+ fray_clear_msg_ram();
+
/* Configure all FlexRay cluster, node and msgRAM parameters */
Fr_config_cluster_parameters(&Fr_Config->clusterConfiguration);
Fr_config_node_parameters(&Fr_Config->nodeConfiguration);
}
}
-
- //The function Fr_ControllerInit shall ensure that no transmission requests are pending
-
- //The function Fr_ControllerInit shall ensure that no reception indications are pending.
-
- //The function Fr_ControllerInit shall ensure that no interrupts are pending.
-
- //The function Fr_ControllerInit shall ensure that all timers are disabled.
-
- //The function Fr_ControllerInit shall disable all LPdus which are dynamically reconfigurable
-
- /*If the function Fr_ControllerInit detects errors while testing the
- CC (CC test), then it shall repeat the test procedure a configurable number
- (FrCtrlTestCount) of times. If all tests fail, then it calls Dem_ReportErrorStatus
- (FrDemCtrlTestResultRef,
- DEM_EVENT_STATUS_FAILED)
- and
- returns
- E_NOT_OK.
- The CC test as described in SWS_Fr_00147 shall verify (read
- back and compare to reference values held in the configuration) that the node and
- cluster FlexRay parameters were written properly into the FlexRay CC.
- */
+ /* Switch POC to ready state */
+ if (Fr_POC_go_to_ready() == E_NOT_OK) {
+ return E_NOT_OK;
+ }
return E_OK;
-
}
Std_ReturnType Fr_StartCommunication(uint8_t Fr_CtrlIdx) {
}
Std_ReturnType Fr_ReconfigLPdu(uint8_t Fr_CtrlIdx, uint16_t Fr_LPduIdx, uint16_t Fr_FrameId, Fr_ChannelType Fr_ChnlIdx, uint8_t Fr_CycleRepetition, uint8_t Fr_CycleOffset, uint8_t Fr_PayloadLength, uint16_t Fr_HeaderCRC) {
+ /* TODO: Implement */
return E_OK;
}
Std_ReturnType Fr_DisableLPdu(uint8_t Fr_CtrlIdx, uint16_t Fr_LPduIdx) {
+ /* TODO: Implement */
return E_OK;
}