adcREG1->CLOCKCR = 100/(1*1000000000/RPP_VCLK1_FREQ); /* 100 = cycle time in ns */
/** - Setup memory boundaries */
- adcREG1->BNDCR =(8U << 16U)|(8U + 8U);
+ adcREG1->BNDCR =(8U << 16U)|(8U + 12U);
adcREG1->BNDEND = 2U;
/** - Setup event group conversion mode
// ADC1, Group1
- // AD1IN[0-15] used on the HDK
+ // AD1IN[0-23] used on the HydCtr board
_BV( 0) |
_BV( 1) |
_BV( 2) |
_BV(13) |
_BV(14) |
_BV(15) |
+ _BV(16) |
+ _BV(17) |
+ _BV(18) |
+ _BV(19) |
+ _BV(20) |
+ _BV(21) |
+ _BV(22) |
+ _BV(23) |
0x0,
// ADC1, Group2
// ADC, Group
static const uint32_t s_adcFiFoSize[2U][3U] =
{
- {0U, 16U, 0U},
+ {0U, 24U, 0U},
{0U, 0U, 0U}
};