]> rtime.felk.cvut.cz Git - pes-rpp/rpp-lib.git/commitdiff
Buffer configuration function tuned to respect start up and sync configuration.
authorMichal Horn <hornmich@fel.cvut.cz>
Mon, 12 Aug 2013 13:12:22 +0000 (15:12 +0200)
committerMichal Horn <hornmich@fel.cvut.cz>
Mon, 12 Aug 2013 13:12:22 +0000 (15:12 +0200)
rpp/src/drv/fr_tms570.c

index aee1f7319d44f31f1e5f82ace1fa20a2d03e379f..e2c2a7064ef75522aefac41e4d1911bcd33220c3 100644 (file)
@@ -1269,7 +1269,7 @@ Std_ReturnType Fr_PrepareLPdu(uint8_t Fr_CtrlIdx, uint16_t Fr_LPduIdx) {
        for (i = 0; i < FR_MAX_BUFFERS_CNT; i++) {
                if (Fr_BuffersPtrs[i]->slotId == Fr_LPduIdx) {  // Next occurrence of the frame ID found, index retrieved into i.
                        if (Fr_BuffersConfigured[i] == FALSE) { // Buffer was not yet configured
-                               mode = (Fr_BuffersPtrs[i]->singleTransmit == TRUE) ? FRAY_BUF_MBI_EN : FRAY_BUF_MBI_DIS;
+                               mode = (Fr_BuffersPtrs[i]->msgBufferInterrupt == TRUE) ? FRAY_BUF_MBI_EN : FRAY_BUF_MBI_DIS;
                                mode |= (Fr_BuffersPtrs[i]->singleTransmit == TRUE) ? FRAY_BUF_TX_MODE_SINGLE : FRAY_BUF_TX_MODE_CONTINUOUS;
                                mode |= (Fr_BuffersPtrs[i]->payloadPreambleIndicatorTr == TRUE) ? FRAY_BUF_NM_EN : FRAY_BUF_NM_DIS;
                                mode |= (Fr_BuffersPtrs[i]->isTx == TRUE) ? FRAY_BUF_TX : FRAY_BUF_RX;
@@ -1278,6 +1278,12 @@ Std_ReturnType Fr_PrepareLPdu(uint8_t Fr_CtrlIdx, uint16_t Fr_LPduIdx) {
                                mode |= (Fr_BuffersPtrs[i]->rejectNullFrames == TRUE) ? FRAY_BUF_REJECT_NULL_FRAMES : FRAY_BUF_ACCEPT_NULL_FRAMES;
                                mode |= (Fr_BuffersPtrs[i]->rejectStaticSegment == TRUE) ? FRAY_BUF_REJECT_STATIC_SEGMENT : FRAY_BUF_ACCEPT_STATIC_SEGMENT;
                                mode |= FRAY_BUF_TXREQ_DIS;
+                               if (Fr_ConfigParPtrs[FR_CIDX_PKEYSLOTUSEDFORSTARTUP] == 1) {
+                                       mode |= FRAY_BUF_SFI_EN;
+                               }
+                               if (Fr_ConfigParPtrs[FR_CIDX_PKEYSLOTUSEDFORSYNC] == 1) {
+                                       mode |= FRAY_BUF_SYNC_EN;
+                               }
                                Fr_MsgRAMDataPtrs[i] = Fr_MsgRAMDataOffset;
                                if (i >= __mfld2val(MRC_FFB_MSK, frayREG->MRC_UN.MRC_UL)) { // This is RX FIFO buffer
                                        fray_configure_fifo_buffer(i, mode, Fr_BuffersPtrs[i]->cycleCounterFiltering,  Fr_BuffersPtrs[i]->slotId, Fr_BuffersPtrs[i]->maxPayload, Fr_MsgRAMDataPtrs[i]);