after reset phy pin control fixed, general code maintenance

documentation fix

diff --git a/rpp/include/rpp/eth.h b/rpp/include/rpp/eth.h
index 7fb9b4ffb1c4dd70eb5f52f1cb953d1500d464d5..a6365a8ace7040f13ba595c845dd1dde2a3eae38 100644 (file)
--- a/rpp/include/rpp/eth.h
+++ b/rpp/include/rpp/eth.h
@@ -77,6 +77,9 @@ int8_t rpp_eth_init_postInit(uint32_t instNum, uint8_t *macArray);
  * Uses MDIO module to read link status of PHY attached to #instNum network interface
  *
  * @param instNum Number of network interface
+ *
+ * @return TRUE if link is UP
+ *         FALSE if link is DOWN
  */
 uint32_t rpp_eth_phylinkstat(uint32_t instNum);
 
@@ -156,6 +159,8 @@ void rpp_eth_recv_raw(void *arg);
 /**
  * Handles freeing of buffer descriptors and other structures in memory
  * after transmission of bd was completed.
+ *
+ * @param arg hdkif
  */
 void rpp_eth_send_bd_handler(void *arg);
 

diff --git a/rpp/src/rpp/eth.c b/rpp/src/rpp/eth.c
index 4097bd5df6bf45c7ce5caf5e42657783df833e2b..68f7e2937d9abbd377c71ee9bf2bb9ddc996c7d1 100644 (file)
--- a/rpp/src/rpp/eth.c
+++ b/rpp/src/rpp/eth.c
@@ -198,7 +198,7 @@ struct hdkif {
   /* emac instance number */
   u32_t inst_num;
 
-  u8_t mac_addr[6];
+  u8_t mac_addr[MAC_ADDR_LEN];
 
   /* emac base address */
   u32_t emac_base;
@@ -583,18 +583,20 @@ err_t rpp_eth_lwip_init(struct netif *netif)
     return rpp_eth_hw_init_postInit(netif);
 }
 
+#define INIT_ONLY_AFTER_RESET 1
 err_t rpp_eth_hw_init(struct hdkif *hdkif)
 {
-       /* FIXME: express initial index using defines */
-    uint8_t index = 80; /* Initially used to hw reset of PHY connected to GIO pin 'rpp project only'; 1us - according to PHY specification. */
+    uint8_t index = configCPU_CLOCK_HZ/1000000;; /* Initially used to hw reset of PHY connected to GIO pin 'rpp project only'; 1us - according to PHY specification. */
     uint16_t regContent;
     uint32_t physAlive;
 
     /* Deactivate reset pin of PHY */
     /* for hw reset of PHY, it is necessary that PIN_NAME_ETHRST is 1us logical low state, before putting it to logical high */
-    /* we have pull-down resistor, so after reset, we only need to put ETHRST pin to log. high */
+#if !INIT_ONLY_AFTER_RESET
     hal_gpio_pin_set_value(*hal_gpio_pin_get_dsc(PIN_NAME_ETHRST,-1),0);
     while(index--);
+#endif
+    /* we have pull-down resistor, so after reset, we only need to put ETHRST pin to log. high */
     hal_gpio_pin_set_value(*hal_gpio_pin_get_dsc(PIN_NAME_ETHRST,-1),1);
 
     /* initializes EMAC control module and EMAC module */
@@ -805,10 +807,10 @@ err_t rpp_eth_hw_init_postInit(struct netif *netif)
     for (regContent = 0; regContent < 8; regContent++) /* i..channel_number */
        EMACMACAddrSet(hdkif->emac_base, regContent, hdkif->mac_addr, EMAC_MACADDR_NO_MATCH_NO_FILTER);
 
-    /* wait for autonegotiation to be done - XXX: autoneg still don't have to be done, you need to check if LINK is up in user app, using eth api fnc or netif api fnc */
+    /* wait for autonegotiation to be done or continue, when delay was reached */
 #if !NO_SYS
     uint32_t timeToWake = hdkif->waitTicksForPHYAneg + sys_jiffies();
-    while(hdkif->phy_autoneg_is_done(hdkif->mdio_base, hdkif->phy_addr) == FALSE && timeToWake > sys_jiffies())vTaskDelay(20); /* XXX: if init is not done at the startup, this might cause troubles */
+    while(hdkif->phy_autoneg_is_done(hdkif->mdio_base, hdkif->phy_addr) == FALSE && timeToWake > sys_jiffies())vTaskDelay(20); /* XXX: if init is not done at the startup, but couple days later, this might cause troubles */
 #else
     while(hdkif->phy_autoneg_is_done(hdkif->mdio_base, hdkif->phy_addr) == FALSE && autonegFinishWait--); /* wait till aneg done */
 #endif
@@ -820,15 +822,6 @@ err_t rpp_eth_hw_init_postInit(struct netif *netif)
        rpp_debug_printf((const char *) "aneg timeout \r\n");
 #endif
 
-    /* check if phy link is up - it is when autoneg was completed succesfully */
-/*    if(!PHY_link_status_get(hdkif->mdio_base, hdkif->phy_addr, 3))
-    {
-#ifdef DEBUG
-       rpp_debug_printf((const char *) "Link is down\r\n");
-#endif
-       return PHY_LINK_DOWN;
-    }*/
-
     /* provide informations retrieved from autoneg to EMAC module */
     hdkif->phy_partnerability(hdkif->mdio_base, hdkif->phy_addr, &regContent);
     if (regContent & (PHY_100BASETXDUPL_m | PHY_10BASETDUPL_m)) {
@@ -973,7 +966,6 @@ void rpp_eth_recv_raw(void *arg)
        vim_mask_set(RXinterruptVectorNumber);
        sys_arch_sem_wait(&(hdkif->goRX), 0);
        /* TODO: this place is candidate for LINKINT polling (if not solved through interrupt later) */
-       //xSemaphoreTake( hdkif->goRX, 0 );
 #endif
 
            /* Get the bd which contains the earliest filled data */