Merge port and gpio definitions into one file in the DRV layer

[pes-rpp/rpp-lib.git] / rpp / src / drv / fr_tms570.c

diff --git a/rpp/src/drv/fr_tms570.c b/rpp/src/drv/fr_tms570.c
index eb75c9389087db596b9287c962a78723632b2e07..b5be0ebbc578f23e2a62d6cac5c1ff96ad5cef92 100644 (file)
--- a/rpp/src/drv/fr_tms570.c
+++ b/rpp/src/drv/fr_tms570.c
@@ -17,7 +17,7 @@
 #include "drv/drv.h"
 #include "sys/ti_drv_fray.h"
 #include "binary.h"
-#include "hal/hal.h"
+#include "drv/digital_io.h"
 
 /**
  * The structure maps a RX/TX buffer to a slot in the communication cycle.
@@ -48,7 +48,7 @@ static uint32_t fray_spi_cmd_sh;
 /** Array of responses for each fray driver */
 static uint32_t fray_spi_resp[FRAY_NUM_PORTS];
 /** Array of port names to be easily accessible by indexing */
-static const char *fray_port_names[FRAY_NUM_PORTS] = { PORT_NAME_FRAY1, PORT_NAME_FRAY2 };
+static const char *fray_port_names[FRAY_NUM_PORTS] = { DIO_PORT_NAME_FRAY1, DIO_PORT_NAME_FRAY2 };
 /** Array of integers, where FlexRay cluster and node configuration
  * parameters are stored to be accessible by indexes defined in Fr_GeneralTypes.h.
  */
@@ -2198,10 +2198,10 @@ Std_ReturnType Fr_ReadCCConfig( uint8_t Fr_CtrlIdx, uint8_t Fr_ConfigParamIdx, u
 int Fr_spi_transfer(uint8_t port)
 {
        uint32_t commands[2];
-       port_desc_t *desc;
+       dio_port_desc_t *desc;
 
        if (port > FRAY_NUM_PORTS) return -1;
-       desc = hal_port_get_dsc(fray_port_names[port], -1);
+       desc = dio_port_get_dsc(fray_port_names[port], -1);
        fray_spi_cmd_sh = fray_spi_cmd;
        commands[0] = (fray_spi_cmd_sh & 0xFF00) >> 8;
        commands[1] = (fray_spi_cmd_sh & 0xFF);