2 * @brief PINMUX Driver Implementation File
8 /* (c) Texas Instruments 2009-2012, All rights reserved. */
12 #include "sys/_tms570_hydctr/sys_pinmux.h"
14 #define PINMUX_SET(REG, BALLID, MUX) \
15 pinMuxReg->PINMMR##REG = (pinMuxReg->PINMMR##REG & PINMUX_BALL_##BALLID##_MASK) | (PINMUX_BALL_##BALLID##_##MUX)
17 #define PINMUX_GATE_EMIF_CLK_ENABLE \
18 pinMuxReg->PINMMR29 = (pinMuxReg->PINMMR29 & PINMUX_GATE_EMIF_CLK_MASK) | PINMUX_GATE_EMIF_CLK
20 #define PINMUX_GIOB_DISABLE_HET2_ENABLE(state) \
21 (pinMuxReg->PINMMR29 = (pinMuxReg->PINMMR29 & PINMUX_GIOB_DISABLE_HET2_MASK) | (PINMUX_GIOB_DISABLE_HET2_##state))
23 #define PINMUX_ALT_ADC_TRIGGER_SELECT(num) \
24 pinMuxReg->PINMMR30 = (pinMuxReg->PINMMR30 & PINMUX_ALT_ADC_TRIGGER_MASK) | (PINMUX_ALT_ADC_TRIGGER_##num)
26 #define PINMUX_ETHERNET_SELECT(interface) \
27 pinMuxReg->PINMMR29 = (pinMuxReg->PINMMR29 & PINMUX_ETHERNET_MASK) | (PINMUX_ETHERNET_##interface)
31 /* Enable Pin Muxing */
32 kickerReg->KICKER0 = 0x83E70B13;
33 kickerReg->KICKER1 = 0x95A4F1E0;
35 pinMuxReg->PINMMR0 = PINMUX_BALL_C3_I2C_SCL | PINMUX_BALL_B2_I2C_SDA;
37 pinMuxReg->PINMMR1 = PINMUX_BALL_E3_MIBSPI3NCS_4;
39 pinMuxReg->PINMMR2 = PINMUX_BALL_C1_GIOA_2 | PINMUX_BALL_E1_GIOA_3 | (1 << 26) /* EPWM1A */;
41 pinMuxReg->PINMMR3 = (1 << 19) /* EPWM1B */;
43 pinMuxReg->PINMMR4 = (1 << 2) /* EPWM2A */ | PINMUX_BALL_V2_HET1_01 | PINMUX_BALL_U1_HET1_03;
45 pinMuxReg->PINMMR5 = (1 << 2) /* EPWM2B */ | (1 << 10) /* EPWM3A */ | (1 << 19) /* EPWM3B */;
47 pinMuxReg->PINMMR6 = (1 << 4) /* EPWM7B */ | PINMUX_BALL_P5_EMIF_DATA_11 | (1 << 20) /* EPWM7A */;
49 pinMuxReg->PINMMR7 = (1 << 18) /* EPWM5A */ | PINMUX_BALL_V5_MIBSPI3NCS_1;
51 pinMuxReg->PINMMR8 = PINMUX_BALL_G3_MIBSPI1NCS_2 | (1 << 18) /* ECAP1 */ | (1 << 2) /* EPWM5B */;
53 pinMuxReg->PINMMR9 = PINMUX_BALL_J3_MIBSPI1NCS_3 | PINMUX_BALL_W9_MIBSPI3NCS_5 | PINMUX_BALL_V10_MIBSPI3NCS_0;
55 pinMuxReg->PINMMR10 = PINMUX_BALL_N19_AD1EVT | PINMUX_BALL_N17_EMIF_nCS_0;
57 pinMuxReg->PINMMR11 = PINMUX_BALL_K17_EMIF_nCS_3 | PINMUX_BALL_P1_HET1_24;
59 pinMuxReg->PINMMR12 = PINMUX_BALL_A14_HET1_26 | (0x1 << 20) /* ECAP4 */ | (0x1 << 29) /* ECAP5 */;
61 pinMuxReg->PINMMR13 = PINMUX_BALL_J18_MIBSPI5SOMI_0 | PINMUX_BALL_J19_MIBSPI5SIMO_0 | PINMUX_BALL_H19_MIBSPI5CLK | (0x1 << 28) /* ECAP6 */;
63 pinMuxReg->PINMMR14 = PINMUX_BALL_E18_HET1_08 | PINMUX_BALL_K19_HET1_28 | PINMUX_BALL_D17_EMIF_nWE | PINMUX_BALL_D16_EMIF_BA_1;
65 pinMuxReg->PINMMR17 = PINMUX_BALL_D19_HET1_10 | PINMUX_BALL_B4_HET1_12;
67 pinMuxReg->PINMMR19 = PINMUX_BALL_B11_HET1_30;
69 /* pin mutexed with N2HET1[17], which can (and by this implementation is) also be enabled on another ball
70 * through register PINMMR24[16].
72 * On this ball there is a Sensor_Supply_1_En connected. To be able to enable the sensor, the HET pin has
73 * to be enabled on this ball and disabled on the other. But LED, connected to the other ball will not work.
75 pinMuxReg->PINMMR20 = PINMUX_BALL_F3_MIBSPI1NCS_1;
77 pinMuxReg->PINMMR21 = PINMUX_BALL_D5_EMIF_ADDR_1;
79 pinMuxReg->PINMMR22 = PINMUX_BALL_D4_EMIF_ADDR_0 | PINMUX_BALL_C5_EMIF_ADDR_7 | PINMUX_BALL_C4_EMIF_ADDR_6 | (0x1 << 24) /* EMIF_ADDR_8 */;
81 pinMuxReg->PINMMR23 = ((~(pinMuxReg->PINMMR5 >> 1U) & 0x00000001U ) << 8U) | ((~(pinMuxReg->PINMMR5 >> 9U) & 0x00000001U ) << 16U) | ((~(pinMuxReg->PINMMR5 >> 17U) & 0x00000001U ) << 24U) | PINMUX_BALL_C6_EMIF_ADDR_8;
83 pinMuxReg->PINMMR24 = ((~(pinMuxReg->PINMMR4 >> 17U) & 0x00000001U ) << 0U) | ((~(pinMuxReg->PINMMR4 >> 25U) & 0x00000001U ) << 8U) | PINMUX_BALL_A13_HET1_17 | PINMUX_BALL_B13_HET1_19;
85 pinMuxReg->PINMMR25 = PINMUX_BALL_H4_HET1_21 | PINMUX_BALL_J4_HET1_23 | PINMUX_BALL_M3_HET1_25 | (1 << 24) /* N2HET1[27] */;
87 pinMuxReg->PINMMR26 = PINMUX_BALL_A3_HET1_29 | PINMUX_BALL_J17_HET1_31;
89 pinMuxReg->PINMMR27 = (1 << 2) /* EPWM4A */;
91 pinMuxReg->PINMMR29 = PINMUX_BALL_D3_SPI2NENA | (1 << 16) /* GIOB[2] */;
93 pinMuxReg->PINMMR33 = (1 << 1) /* EPWM4B */ | (1 << 8) /* MIBSPI3SOMI[0] */ | (1 << 16) /* MIBSPI3SIMO[0] */ | (1 << 24) /* MIBSPI3CLK */;
95 pinMuxReg->PINMMR34 = (1 << 0) /* N2HET1[16] */ | (1 << 9) /* EPWM6A */ | (1 << 17) /* EPWM6B */;
97 PINMUX_GATE_EMIF_CLK_ENABLE;
98 PINMUX_GIOB_DISABLE_HET2_ENABLE(OFF);
99 PINMUX_ALT_ADC_TRIGGER_SELECT(1);
100 PINMUX_ETHERNET_SELECT(RMII);
102 /* Disable Pin Muxing */
103 kickerReg->KICKER0 = 0x00000000U;
104 kickerReg->KICKER1 = 0x00000000U;
106 /* Bit 31 of register GPREG1 is used to gate off the
107 EMIF module outputs */
108 systemREG1->GPREG1 |= 0x80000;
112 * This function explicitly enable/disable HET2 inputs for IRC module
113 * Parameters: irc - IRC number
114 * 1 for IRC is connected to DIN10 and DIN11
115 * 2 for IRC is connected to DIN14 and DIN15
116 * enable - TRUE for IRC, FALSE for normal usage as digital inputs
118 void setMuxForIRC(int8_t irc, boolean_t enable) {
120 /* Enable Pin Muxing */
121 kickerReg->KICKER0 = 0x83E70B13;
122 kickerReg->KICKER1 = 0x95A4F1E0;
126 case 1: // set DIN10 and DIN11 to HET2
127 PINMUX_SET(2,C1,HET2_0);
128 PINMUX_SET(2,E1,HET2_2);
130 case 2: // set DIN14 and DIN15 to HET2
131 PINMUX_SET(3,H3,HET2_4);
132 PINMUX_SET(4,M1,HET2_6);
137 case 1: // set DIN10 and DIN11 back from HET2
138 PINMUX_SET(2,C1,GIOA_2);
139 PINMUX_SET(2,E1,GIOA_3);
141 case 2: // set DIN14 and DIN15 back from HET2
142 PINMUX_SET(3,H3,GIOA_6);
143 PINMUX_SET(4,M1,GIOA_7);
150 /* Disable Pin Muxing */
151 kickerReg->KICKER0 = 0x00000000;
152 kickerReg->KICKER1 = 0x00000000;