#define PCI_VENDOR_ID_HUMUSOFT 0x186c
#define PCI_DEVICE_ID_MF624 0x0624
#define PCI_SUBVENDOR_ID_HUMUSOFT 0x186c
-#define PCI_SUBDEVICE_DEVICE 0x0000
+#define PCI_SUBDEVICE_DEVICE 0x0624
#define INTCSR 0x4C
#define INTCSR_ADINT_ENABLE (1 << 0)
{
u32 *INTCSR_reg = ((u32*) info->mem[0].internal_addr) + INTCSR;
- if ((*INTCSR_reg & INTCSR_ADINT_ENABLE) && (*INTCSR_reg & INTCSR_ADINT_STATUS))
+ if (((*INTCSR_reg & INTCSR_ADINT_ENABLE) > 0) && ((*INTCSR_reg & INTCSR_ADINT_STATUS) > 0))
{
//disable interrupt
mf624_disable_interrupt(ADC, info);
return IRQ_HANDLED;
}
- if ((*INTCSR_reg & INTCSR_CTR4INT_ENABLE) && (*INTCSR_reg & INTCSR_CTR4INT_STATUS))
+ if (((*INTCSR_reg & INTCSR_CTR4INT_ENABLE) > 0) && ((*INTCSR_reg & INTCSR_CTR4INT_STATUS) > 0))
{
//disable interrupt
mf624_disable_interrupt(CTR4, info);
info->name = "MF624";
info->version = "0.0.1";
-
info->mem[0].name = "PCI chipset, interrupts, status bits, special functions";
info->mem[0].addr = pci_resource_start(dev, 0);
if (!info->mem[0].addr)
goto out_release;
info->mem[1].size = pci_resource_len(dev, 1);
info->mem[1].memtype = UIO_MEM_PHYS;
- info->mem[1].internal_addr = pci_ioremap_bar(dev, 1);
+ info->mem[1].internal_addr = pci_ioremap_bar(dev, 2);
if (!info->mem[1].internal_addr)
goto out_release;
goto out_release;
info->mem[2].size = pci_resource_len(dev, 2);
info->mem[2].memtype = UIO_MEM_PHYS;
- info->mem[2].internal_addr = pci_ioremap_bar(dev, 2);
+ info->mem[2].internal_addr = pci_ioremap_bar(dev, 4);
if (!info->mem[2].internal_addr)
goto out_release;
info->irqcontrol = mf624_irqcontrol;
if(uio_register_device(&dev->dev, info))
- goto out_release;
+ goto out_unmap;
pci_set_drvdata(dev, info);
return 0;
+
+out_unmap:
+ iounmap(info->mem[0].internal_addr);
+ iounmap(info->mem[1].internal_addr);
+ iounmap(info->mem[2].internal_addr);
out_release:
pci_release_regions(dev);
out_disable: