2 * UIO driver fo Humusoft MF624 DAQ card.
3 * Copyright (C) 2011 Rostislav Lisovy <lisovy@gmail.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/device.h>
23 #include <linux/pci.h>
24 #include <linux/slab.h>
26 #include <linux/kernel.h>
27 #include <linux/uio_driver.h>
30 #define PCI_VENDOR_ID_HUMUSOFT 0x186c
31 #define PCI_DEVICE_ID_MF624 0x0624
32 #define PCI_SUBVENDOR_ID_HUMUSOFT 0x186c
33 #define PCI_SUBDEVICE_DEVICE 0x0624
36 #define INTCSR_ADINT_ENABLE (1 << 0)
37 #define INTCSR_CTR4INT_ENABLE (1 << 3)
38 #define INTCSR_PCIINT_ENABLE (1 << 6)
39 #define INTCSR_ADINT_STATUS (1 << 2)
40 #define INTCSR_CTR4INT_STATUS (1 << 5)
42 enum mf624_interrupt_source {ADC, CTR4, ALL};
45 void mf624_disable_interrupt(enum mf624_interrupt_source source,
46 struct uio_info *info)
48 u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
52 iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE),
56 iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_CTR4INT_ENABLE),
60 iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE |
61 INTCSR_CTR4INT_ENABLE), INTCSR_reg);
64 iowrite32(ioread32(INTCSR_reg) & ~(INTCSR_ADINT_ENABLE |
65 INTCSR_CTR4INT_ENABLE), INTCSR_reg);
70 void mf624_enable_interrupt(enum mf624_interrupt_source source,
71 struct uio_info *info)
73 u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
77 iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE),
81 iowrite32(ioread32(INTCSR_reg) | (INTCSR_CTR4INT_ENABLE),
85 iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE |
86 INTCSR_CTR4INT_ENABLE), INTCSR_reg);
89 iowrite32(ioread32(INTCSR_reg) | (INTCSR_ADINT_ENABLE |
90 INTCSR_CTR4INT_ENABLE), INTCSR_reg);
95 static irqreturn_t mf624_irq_handler(int irq, struct uio_info *info)
97 u8 __iomem *INTCSR_reg = (u8 *)info->mem[0].internal_addr + INTCSR;
99 if (((ioread32(INTCSR_reg) & INTCSR_ADINT_ENABLE) > 0)
100 && ((ioread32(INTCSR_reg) & INTCSR_ADINT_STATUS) > 0)) {
101 /* disable interrupt */
102 mf624_disable_interrupt(ADC, info);
106 if (((ioread32(INTCSR_reg) & INTCSR_CTR4INT_ENABLE) > 0)
107 && ((ioread32(INTCSR_reg) & INTCSR_CTR4INT_STATUS) > 0)) {
108 /* disable interrupt */
109 mf624_disable_interrupt(CTR4, info);
116 static int mf624_irqcontrol(struct uio_info *info, s32 irq_on)
118 if (irq_on == 0) { /* Disable interrupts */
119 mf624_disable_interrupt(ALL, info);
120 } else if (irq_on == 1) {
121 mf624_enable_interrupt(ALL, info);
127 static int __devinit mf624_pci_probe(struct pci_dev *dev,
128 const struct pci_device_id *id)
130 struct uio_info *info;
132 info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
136 if (pci_enable_device(dev))
139 if (pci_request_regions(dev, "mf624"))
142 info->name = "mf624";
143 info->version = "0.0.1";
146 info->mem[0].name = "PCI chipset, interrupts, status "
147 "bits, special functions";
148 info->mem[0].addr = pci_resource_start(dev, 0);
149 if (!info->mem[0].addr)
151 info->mem[0].size = pci_resource_len(dev, 0);
152 info->mem[0].memtype = UIO_MEM_PHYS;
153 info->mem[0].internal_addr = pci_ioremap_bar(dev, 0);
154 if (!info->mem[0].internal_addr)
159 info->mem[1].name = "ADC, DAC, DIO";
160 info->mem[1].addr = pci_resource_start(dev, 2);
161 if (!info->mem[1].addr)
163 info->mem[1].size = pci_resource_len(dev, 2);
164 info->mem[1].memtype = UIO_MEM_PHYS;
165 info->mem[1].internal_addr = pci_ioremap_bar(dev, 2);
166 if (!info->mem[1].internal_addr)
171 info->mem[2].name = "Counter/timer chip";
172 info->mem[2].addr = pci_resource_start(dev, 4);
173 if (!info->mem[2].addr)
175 info->mem[2].size = pci_resource_len(dev, 4);
176 info->mem[2].memtype = UIO_MEM_PHYS;
177 info->mem[2].internal_addr = pci_ioremap_bar(dev, 4);
178 if (!info->mem[2].internal_addr)
182 info->irq = dev->irq;
183 info->irq_flags = IRQF_SHARED;
184 info->handler = mf624_irq_handler;
186 info->irqcontrol = mf624_irqcontrol;
188 if (uio_register_device(&dev->dev, info))
191 pci_set_drvdata(dev, info);
197 iounmap(info->mem[0].internal_addr);
198 iounmap(info->mem[1].internal_addr);
199 iounmap(info->mem[2].internal_addr);
201 pci_release_regions(dev);
203 pci_disable_device(dev);
209 static void mf624_pci_remove(struct pci_dev *dev)
211 struct uio_info *info = pci_get_drvdata(dev);
213 mf624_disable_interrupt(ALL, info);
215 uio_unregister_device(info);
216 pci_release_regions(dev);
217 pci_disable_device(dev);
218 pci_set_drvdata(dev, NULL);
220 iounmap(info->mem[0].internal_addr);
221 iounmap(info->mem[1].internal_addr);
222 iounmap(info->mem[2].internal_addr);
227 static DEFINE_PCI_DEVICE_TABLE(mf624_pci_id) = {
228 { PCI_DEVICE(PCI_VENDOR_ID_HUMUSOFT, PCI_DEVICE_ID_MF624) },
232 static struct pci_driver mf624_pci_driver = {
234 .id_table = mf624_pci_id,
235 .probe = mf624_pci_probe,
236 .remove = mf624_pci_remove,
238 MODULE_DEVICE_TABLE(pci, mf624_pci_id);
240 static int __init mf624_init_module(void)
242 return pci_register_driver(&mf624_pci_driver);
245 static void __exit mf624_exit_module(void)
247 pci_unregister_driver(&mf624_pci_driver);
250 module_init(mf624_init_module);
251 module_exit(mf624_exit_module);
253 MODULE_LICENSE("GPL v2");
254 MODULE_AUTHOR("Rostislav Lisovy <lisovy@gmail.com>");