2 * UIO driver fo Humusoft MF624 DAQ card.
3 * Copyright (C) 2011 Rostislav Lisovy <lisovy@gmail.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/device.h>
23 #include <linux/pci.h>
24 #include <linux/slab.h>
26 #include <linux/kernel.h>
27 #include <linux/uio_driver.h>
29 #define PCI_VENDOR_ID_HUMUSOFT 0x186c
30 #define PCI_DEVICE_ID_MF624 0x0624
31 #define PCI_SUBVENDOR_ID_HUMUSOFT 0x186c
32 #define PCI_SUBDEVICE_DEVICE 0x0624
34 /* BAR0 Interrupt control/status register */
36 #define INTCSR_ADINT_ENABLE (1 << 0)
37 #define INTCSR_CTR4INT_ENABLE (1 << 3)
38 #define INTCSR_PCIINT_ENABLE (1 << 6)
39 #define INTCSR_ADINT_STATUS (1 << 2)
40 #define INTCSR_CTR4INT_STATUS (1 << 5)
42 enum mf624_interrupt_source {ADC, CTR4, ALL};
44 void mf624_disable_interrupt(enum mf624_interrupt_source source,
45 struct uio_info *info)
47 void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
51 iowrite32(ioread32(INTCSR_reg)
52 & ~(INTCSR_ADINT_ENABLE | INTCSR_PCIINT_ENABLE),
57 iowrite32(ioread32(INTCSR_reg)
58 & ~(INTCSR_CTR4INT_ENABLE | INTCSR_PCIINT_ENABLE),
64 iowrite32(ioread32(INTCSR_reg)
65 & ~(INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE
66 | INTCSR_PCIINT_ENABLE),
72 void mf624_enable_interrupt(enum mf624_interrupt_source source,
73 struct uio_info *info)
75 void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
79 iowrite32(ioread32(INTCSR_reg)
80 | INTCSR_ADINT_ENABLE | INTCSR_PCIINT_ENABLE,
85 iowrite32(ioread32(INTCSR_reg)
86 | INTCSR_CTR4INT_ENABLE | INTCSR_PCIINT_ENABLE,
92 iowrite32(ioread32(INTCSR_reg)
93 | INTCSR_ADINT_ENABLE | INTCSR_CTR4INT_ENABLE
94 | INTCSR_PCIINT_ENABLE,
100 static irqreturn_t mf624_irq_handler(int irq, struct uio_info *info)
102 void __iomem *INTCSR_reg = info->mem[0].internal_addr + INTCSR;
104 if ((ioread32(INTCSR_reg) & INTCSR_ADINT_ENABLE)
105 && (ioread32(INTCSR_reg) & INTCSR_ADINT_STATUS)) {
106 mf624_disable_interrupt(ADC, info);
110 if ((ioread32(INTCSR_reg) & INTCSR_CTR4INT_ENABLE)
111 && (ioread32(INTCSR_reg) & INTCSR_CTR4INT_STATUS)) {
112 mf624_disable_interrupt(CTR4, info);
119 static int mf624_irqcontrol(struct uio_info *info, s32 irq_on)
122 mf624_disable_interrupt(ALL, info);
123 else if (irq_on == 1)
124 mf624_enable_interrupt(ALL, info);
129 static int mf624_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
131 struct uio_info *info;
133 info = kzalloc(sizeof(struct uio_info), GFP_KERNEL);
137 if (pci_enable_device(dev))
140 if (pci_request_regions(dev, "mf624"))
143 info->name = "mf624";
144 info->version = "0.0.1";
146 /* Note: Datasheet says device uses BAR0, BAR1, BAR2 -- do not trust it */
149 info->mem[0].name = "PCI chipset, interrupts, status "
150 "bits, special functions";
151 info->mem[0].addr = pci_resource_start(dev, 0);
152 if (!info->mem[0].addr)
154 info->mem[0].size = pci_resource_len(dev, 0);
155 info->mem[0].memtype = UIO_MEM_PHYS;
156 info->mem[0].internal_addr = pci_ioremap_bar(dev, 0);
157 if (!info->mem[0].internal_addr)
161 info->mem[1].name = "ADC, DAC, DIO";
162 info->mem[1].addr = pci_resource_start(dev, 2);
163 if (!info->mem[1].addr)
165 info->mem[1].size = pci_resource_len(dev, 2);
166 info->mem[1].memtype = UIO_MEM_PHYS;
167 info->mem[1].internal_addr = pci_ioremap_bar(dev, 2);
168 if (!info->mem[1].internal_addr)
172 info->mem[2].name = "Counter/timer chip";
173 info->mem[2].addr = pci_resource_start(dev, 4);
174 if (!info->mem[2].addr)
176 info->mem[2].size = pci_resource_len(dev, 4);
177 info->mem[2].memtype = UIO_MEM_PHYS;
178 info->mem[2].internal_addr = pci_ioremap_bar(dev, 4);
179 if (!info->mem[2].internal_addr)
182 info->irq = dev->irq;
183 info->irq_flags = IRQF_SHARED;
184 info->handler = mf624_irq_handler;
186 info->irqcontrol = mf624_irqcontrol;
188 if (uio_register_device(&dev->dev, info))
191 pci_set_drvdata(dev, info);
196 iounmap(info->mem[2].internal_addr);
198 iounmap(info->mem[1].internal_addr);
200 iounmap(info->mem[0].internal_addr);
203 pci_release_regions(dev);
206 pci_disable_device(dev);
213 static void mf624_pci_remove(struct pci_dev *dev)
215 struct uio_info *info = pci_get_drvdata(dev);
217 mf624_disable_interrupt(ALL, info);
219 uio_unregister_device(info);
220 pci_release_regions(dev);
221 pci_disable_device(dev);
222 pci_set_drvdata(dev, NULL);
224 iounmap(info->mem[0].internal_addr);
225 iounmap(info->mem[1].internal_addr);
226 iounmap(info->mem[2].internal_addr);
231 static DEFINE_PCI_DEVICE_TABLE(mf624_pci_id) = {
232 { PCI_DEVICE(PCI_VENDOR_ID_HUMUSOFT, PCI_DEVICE_ID_MF624) },
236 static struct pci_driver mf624_pci_driver = {
238 .id_table = mf624_pci_id,
239 .probe = mf624_pci_probe,
240 .remove = mf624_pci_remove,
242 MODULE_DEVICE_TABLE(pci, mf624_pci_id);
244 module_pci_driver(mf624_pci_driver);
245 MODULE_LICENSE("GPL v2");
246 MODULE_AUTHOR("Rostislav Lisovy <lisovy@gmail.com>");