5 #include <stdint.h> // uintX_t
9 /* Hardware specific */
11 #define GPIOC_reg 0x54
14 #define ADCTRL_reg 0x00
15 #define ADDATA0_reg 0x00
16 #define ADDATA1_reg 0x02
17 #define ADDATA2_reg 0x04
18 #define ADDATA3_reg 0x06
19 #define ADDATA4_reg 0x08
20 #define ADDATA5_reg 0x0a
21 #define ADDATA6_reg 0x0c
22 #define ADDATA7_reg 0x0e
23 #define ADSTART_reg 0x20
36 #define GPIOC_DACEN_mask (1 << 26)
37 #define GPIOC_LDAC_mask (1 << 23)
38 #define GPIOC_EOLC_mask (1 << 17)
40 #define MFST2REG(mfst, bar_num, reg_offs) \
41 ((void *)(mfst->bar##bar_num.virt_addr + (reg_offs)))
44 typedef struct bar_mapping_t {
54 typedef enum {DA0, DA1, DA2, DA3, DA4, DA5, DA6, DA7} dac_channel_t;
55 typedef enum {AD0, AD1, AD2, AD3, AD4, AD5, AD6, AD7} adc_channel_t;
57 typedef struct mf624_state_t {
64 int ADC_enabled; // Which ADCs are enabled
67 extern mf624_state_t mf624_state;
69 extern void print_8bin(int nr);
71 static inline int16_t mf624_read16(void *ptr)
73 return *(volatile uint16_t*)ptr;
76 static inline int32_t mf624_read32(void *ptr)
78 return *(volatile uint32_t*) ptr;
81 static inline void mf624_write16(uint16_t val, void *ptr)
83 *(volatile uint16_t*) ptr = val;
86 static inline void mf624_write32(uint32_t val, void *ptr)
88 *(volatile uint32_t*) ptr = val;
91 extern void DIO_write(mf624_state_t* mfst, int16_t val);
93 extern uint16_t DIO_read(mf624_state_t* mfst);
95 extern void DAC_enable(mf624_state_t* mfst);
97 extern int DAC_write(mf624_state_t* mfst, dac_channel_t channel, int val);
99 extern int ADC_enable(mf624_state_t* mfst, adc_channel_t channel);
101 extern double ADC_read(mf624_state_t* mfst, adc_channel_t channel);
103 extern int open_device(char* path);
105 extern void wait_for_interrupts(int device_fd);
107 extern int disable_interrupts(int device_fd);
109 extern int enable_interrupts(int device_fd);
111 extern void list_available_mem_regions(char* device);
113 extern void list_available_io_ports(char *device);
115 extern int mmap_regions(mf624_state_t* mfst);