5 #include <stdint.h> // uintX_t
10 /* Hardware specific */
12 #define GPIOC_reg 0x54
15 #define ADCTRL_reg 0x00
16 #define ADDATA0_reg 0x00
17 #define ADDATA1_reg 0x02
18 #define ADDATA2_reg 0x04
19 #define ADDATA3_reg 0x06
20 #define ADDATA4_reg 0x08
21 #define ADDATA5_reg 0x0a
22 #define ADDATA6_reg 0x0c
23 #define ADDATA7_reg 0x0e
24 #define ADSTART_reg 0x20
50 #define GPIOC_DACEN_mask (1 << 26)
51 #define GPIOC_LDAC_mask (1 << 23)
52 #define GPIOC_EOLC_mask (1 << 17)
54 #define MFST2REG(mfst, bar_num, reg_offs) \
55 ((void *)(mfst->bar##bar_num.virt_addr + (reg_offs)))
58 typedef struct bar_mapping_t {
68 typedef enum {DA0, DA1, DA2, DA3, DA4, DA5, DA6, DA7} dac_channel_t;
69 typedef enum {AD0, AD1, AD2, AD3, AD4, AD5, AD6, AD7} adc_channel_t;
71 typedef struct mf624_state_t {
78 int ADC_enabled; // Which ADCs are enabled
82 //extern mf624_state_t mf624_state;
83 extern mf624_state_t* mfst;
85 static uint32_t dac_channel2reg[] = {
96 static uint32_t adc_channel2reg[] = {
107 static inline int16_t mf624_read16(void *ptr)
109 return *(volatile uint16_t*)ptr;
112 static inline int32_t mf624_read32(void *ptr)
114 return *(volatile uint32_t*) ptr;
117 static inline void mf624_write16(uint16_t val, void *ptr)
119 *(volatile uint16_t*) ptr = val;
122 static inline void mf624_write32(uint32_t val, void *ptr)
124 *(volatile uint32_t*) ptr = val;
127 extern void DIO_write(mf624_state_t* mfst, int16_t val);
129 extern uint16_t DIO_read(mf624_state_t* mfst);
131 extern void DAC_enable(mf624_state_t* mfst);
133 extern int DAC_write(mf624_state_t* mfst, dac_channel_t channel, int val);
135 extern int ADC_enable(mf624_state_t* mfst, adc_channel_t channel);
137 extern double ADC_read(mf624_state_t* mfst, adc_channel_t channel);
139 int mf624_init(SimStruct *S);
140 int mf624_check(SimStruct *S);