2 * arch/m68k/coldfire/m547x_8x-devices.c
4 * Coldfire M547x/M548x Platform Device Configuration
6 * Copyright (c) 2008 Freescale Semiconductor, Inc.
7 * Kurt Mahan <kmahan@freescale.com>
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/platform_device.h>
13 #include <linux/fsl_devices.h>
14 #include <linux/spi/spi.h>
16 #include <asm/coldfire.h>
17 #include <asm/mcfsim.h>
18 #include <asm/mcfqspi.h>
28 /* number of supported SPI selects */
29 #define SPI_NUM_CHIPSELECTS 8
31 void coldfire_spi_cs_control(u8 cs, u8 command)
33 /* nothing special required */
36 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
37 static struct coldfire_spi_chip spidev_chip_info = {
42 static struct spi_board_info spi_board_info[] = {
43 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
46 .max_speed_hz = 16000000, /* max clk (SCK) speed in HZ */
48 .chip_select = 0, /* CS0 */
49 .controller_data = &spidev_chip_info,
54 static int spi_irq_list[] = {
55 /* IRQ, ICR Offset, ICR Val,Mask */
56 64 + ISC_DSPI_OVRFW, ISC_DSPI_OVRFW, 0x18, 0,
57 64 + ISC_DSPI_RFOF, ISC_DSPI_RFOF, 0x18, 0,
58 64 + ISC_DSPI_RFDF, ISC_DSPI_RFDF, 0x18, 0,
59 64 + ISC_DSPI_TFUF, ISC_DSPI_TFUF, 0x18, 0,
60 64 + ISC_DSPI_TCF, ISC_DSPI_TCF, 0x18, 0,
61 64 + ISC_DSPI_TFFF, ISC_DSPI_TFFF, 0x18, 0,
62 64 + ISC_DSPI_EOQF, ISC_DSPI_EOQF, 0x18, 0,
66 static struct coldfire_spi_master coldfire_master_info = {
68 .num_chipselect = SPI_NUM_CHIPSELECTS,
69 .irq_list = spi_irq_list,
70 .irq_source = 0, /* not used */
71 .irq_vector = 0, /* not used */
72 .irq_mask = 0, /* not used */
73 .irq_lp = 0, /* not used */
74 .par_val = 0, /* not used */
75 .cs_control = coldfire_spi_cs_control,
78 static struct resource coldfire_spi_resources[] = {
81 .start = MCF_MBAR + 0x00000a50, /* PAR_DSPI */
82 .end = MCF_MBAR + 0x00000a50, /* PAR_DSPI */
83 .flags = IORESOURCE_MEM
88 .start = MCF_MBAR + 0x00008a00, /* DSPI MCR Base */
89 .end = MCF_MBAR + 0x00008ab8, /* DSPI mem map end */
90 .flags = IORESOURCE_MEM
94 .name = "spi-int-level",
95 .start = MCF_MBAR + 0x740, /* ICR start */
96 .end = MCF_MBAR + 0x740 + ISC_DSPI_EOQF, /* ICR end */
97 .flags = IORESOURCE_MEM
101 .name = "spi-int-mask",
102 .start = MCF_MBAR + 0x70c, /* IMRL */
103 .end = MCF_MBAR + 0x70c, /* IMRL */
104 .flags = IORESOURCE_MEM
108 static struct platform_device coldfire_spi = {
109 .name = "spi_coldfire",
111 .resource = coldfire_spi_resources,
112 .num_resources = ARRAY_SIZE(coldfire_spi_resources),
114 .platform_data = &coldfire_master_info,
119 * m547x_8x_spi_init - Initialize SPI
121 static int __init m547x_8x_spi_init(void)
125 /* initialize the DSPI PAR */
126 MCF_GPIO_PAR_DSPI = (MCF_GPIO_PAR_DSPI_PAR_CS5 |
127 MCF_GPIO_PAR_DSPI_PAR_CS3_DSPICS |
128 MCF_GPIO_PAR_DSPI_PAR_CS2_DSPICS |
129 MCF_GPIO_PAR_DSPI_PAR_CS0_DSPICS |
130 MCF_GPIO_PAR_DSPI_PAR_SCK_SCK |
131 MCF_GPIO_PAR_DSPI_PAR_SIN_SIN |
132 MCF_GPIO_PAR_DSPI_PAR_SOUT_SOUT);
134 /* register device */
135 retval = platform_device_register(&coldfire_spi);
140 /* register board info */
141 if (ARRAY_SIZE(spi_board_info))
142 retval = spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
151 * m547x_8x_init_devices - Initialize M547X_8X devices
153 * Returns 0 on success.
155 static int __init m547x_8x_init_devices(void)
163 arch_initcall(m547x_8x_init_devices);