]> rtime.felk.cvut.cz Git - lisovros/qemu_apohw.git/commitdiff
PPC: Make all e500 CPUs SVR aware
authorAlexander Graf <agraf@suse.de>
Sun, 19 Jan 2014 16:39:54 +0000 (17:39 +0100)
committerAlexander Graf <agraf@suse.de>
Mon, 16 Jun 2014 11:24:34 +0000 (13:24 +0200)
Our pre-e500mc e500 CPU types didn't get instanciated with SVR information,
even though those systems do support the SVR register.

Spawn them with the SVR tag so that they don't get confused when someone tries
to read SPR_SVR.

Signed-off-by: Alexander Graf <agraf@suse.de>
target-ppc/cpu-models.c

index 57cb4e48fbb81258cff3f8d1cec9614f99ef8062..9a66c036ec3dacd1f1e6fe455d18abc15dc40e8b 100644 (file)
     POWERPC_DEF_SVR("MPC8379E", "MPC8379E",
                     CPU_POWERPC_MPC837x,      POWERPC_SVR_8379E,     e300)
     /* e500 family                                                           */
-    POWERPC_DEF("e500_v10",      CPU_POWERPC_e500v1_v10,             e500v1,
-                "PowerPC e500 v1.0 core")
-    POWERPC_DEF("e500_v20",      CPU_POWERPC_e500v1_v20,             e500v1,
-                "PowerPC e500 v2.0 core")
-    POWERPC_DEF("e500v2_v10",    CPU_POWERPC_e500v2_v10,             e500v2,
-                "PowerPC e500v2 v1.0 core")
-    POWERPC_DEF("e500v2_v20",    CPU_POWERPC_e500v2_v20,             e500v2,
-                "PowerPC e500v2 v2.0 core")
-    POWERPC_DEF("e500v2_v21",    CPU_POWERPC_e500v2_v21,             e500v2,
-                "PowerPC e500v2 v2.1 core")
-    POWERPC_DEF("e500v2_v22",    CPU_POWERPC_e500v2_v22,             e500v2,
-                "PowerPC e500v2 v2.2 core")
-    POWERPC_DEF("e500v2_v30",    CPU_POWERPC_e500v2_v30,             e500v2,
-                "PowerPC e500v2 v3.0 core")
+    POWERPC_DEF_SVR("e500_v10", "PowerPC e500 v1.0 core",
+                    CPU_POWERPC_e500v1_v10,   POWERPC_SVR_E500,      e500v1);
+    POWERPC_DEF_SVR("e500_v20", "PowerPC e500 v2.0 core",
+                    CPU_POWERPC_e500v1_v20,   POWERPC_SVR_E500,      e500v1);
+    POWERPC_DEF_SVR("e500v2_v10", "PowerPC e500v2 v1.0 core",
+                    CPU_POWERPC_e500v2_v10,   POWERPC_SVR_E500,      e500v2);
+    POWERPC_DEF_SVR("e500v2_v20", "PowerPC e500v2 v2.0 core",
+                    CPU_POWERPC_e500v2_v20,   POWERPC_SVR_E500,      e500v2);
+    POWERPC_DEF_SVR("e500v2_v21", "PowerPC e500v2 v2.1 core",
+                    CPU_POWERPC_e500v2_v21,   POWERPC_SVR_E500,      e500v2);
+    POWERPC_DEF_SVR("e500v2_v22", "PowerPC e500v2 v2.2 core",
+                    CPU_POWERPC_e500v2_v22,   POWERPC_SVR_E500,      e500v2);
+    POWERPC_DEF_SVR("e500v2_v30", "PowerPC e500v2 v3.0 core",
+                    CPU_POWERPC_e500v2_v30,   POWERPC_SVR_E500,      e500v2);
     POWERPC_DEF_SVR("e500mc", "e500mc",
                     CPU_POWERPC_e500mc,       POWERPC_SVR_E500,      e500mc)
 #ifdef TARGET_PPC64