]> rtime.felk.cvut.cz Git - lisovros/qemu_apohw.git/commitdiff
pci: Q35, Root Ports, and Switches create PCI Express buses
authorAlex Williamson <alex.williamson@redhat.com>
Thu, 14 Mar 2013 22:01:17 +0000 (16:01 -0600)
committerMichael S. Tsirkin <mst@redhat.com>
Tue, 26 Mar 2013 19:02:18 +0000 (21:02 +0200)
Convert q35, ioh3420, xio3130_upstream, and xio3130_downstream to
use the new TYPE_PCIE_BUS.

Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
hw/ioh3420.c
hw/q35.c
hw/xio3130_downstream.c
hw/xio3130_upstream.c

index 74d84d4dda4f7d935e2a5ef523039330f7b832f9..5cff61e09576343532703090df878e7138f651b5 100644 (file)
@@ -97,7 +97,7 @@ static int ioh3420_initfn(PCIDevice *d)
     PCIESlot *s = DO_UPCAST(PCIESlot, port, p);
     int rc;
 
-    rc = pci_bridge_initfn(d, TYPE_PCI_BUS);
+    rc = pci_bridge_initfn(d, TYPE_PCIE_BUS);
     if (rc < 0) {
         return rc;
     }
index 37592bc088d4ce142549d4c4e5ba083397b2a666..6ea081aaa3ba7fb340a40564d28c53bf4f95dcf8 100644 (file)
--- a/hw/q35.c
+++ b/hw/q35.c
@@ -55,7 +55,7 @@ static int q35_host_init(SysBusDevice *dev)
     }
     b = pci_bus_new(&s->host.pci.busdev.qdev, "pcie.0",
                     s->mch.pci_address_space, s->mch.address_space_io,
-                    0, TYPE_PCI_BUS);
+                    0, TYPE_PCIE_BUS);
     s->host.pci.bus = b;
     qdev_set_parent_bus(DEVICE(&s->mch), BUS(b));
     qdev_init_nofail(DEVICE(&s->mch));
index a76d89bb6f2e903ccc0d3b0956afe2fc38e22532..b868f56ff9ab29d1c00a61487cc7573151881ca3 100644 (file)
@@ -61,7 +61,7 @@ static int xio3130_downstream_initfn(PCIDevice *d)
     PCIESlot *s = DO_UPCAST(PCIESlot, port, p);
     int rc;
 
-    rc = pci_bridge_initfn(d, TYPE_PCI_BUS);
+    rc = pci_bridge_initfn(d, TYPE_PCIE_BUS);
     if (rc < 0) {
         return rc;
     }
index d8fd19e196d7b84e2c7750d796b10e46dc884adb..cd5d97d2119397df1d930cabfa34620e9f9e91db 100644 (file)
@@ -57,7 +57,7 @@ static int xio3130_upstream_initfn(PCIDevice *d)
     PCIEPort *p = DO_UPCAST(PCIEPort, br, br);
     int rc;
 
-    rc = pci_bridge_initfn(d, TYPE_PCI_BUS);
+    rc = pci_bridge_initfn(d, TYPE_PCIE_BUS);
     if (rc < 0) {
         return rc;
     }