]> rtime.felk.cvut.cz Git - lisovros/qemu_apohw.git/commitdiff
tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h
authorStefan Weil <weil@mail.berlios.de>
Sat, 17 Sep 2011 20:00:28 +0000 (22:00 +0200)
committerBlue Swirl <blauwirbel@gmail.com>
Sat, 1 Oct 2011 06:11:12 +0000 (06:11 +0000)
It is now declared for all tcg targets in tcg.h,
so the tcg target specific declarations are redundant.

Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/arm/tcg-target.h
tcg/hppa/tcg-target.h
tcg/ia64/tcg-target.h
tcg/mips/tcg-target.h
tcg/ppc/tcg-target.h
tcg/ppc64/tcg-target.h
tcg/s390/tcg-target.h
tcg/sparc/tcg-target.h

index 0e0f69acf110a36e964b07fc5e627f315d0b61ef..33afd97895607b9fdc623bf8cc9fb5032d3e488c 100644 (file)
@@ -24,7 +24,6 @@
  */
 #define TCG_TARGET_ARM 1
 
-#define TCG_TARGET_REG_BITS 32
 #undef TCG_TARGET_WORDS_BIGENDIAN
 #undef TCG_TARGET_STACK_GROWSUP
 
index ed90efc146bb5f67a9155ffe77b5c195a87ec9cb..ec9a7bf253b4a84dad86987a141fbe87c1457fc0 100644 (file)
@@ -24,9 +24,7 @@
 
 #define TCG_TARGET_HPPA 1
 
-#if defined(_PA_RISC1_1)
-#define TCG_TARGET_REG_BITS 32
-#else
+#if TCG_TARGET_REG_BITS != 32
 #error unsupported
 #endif
 
index ddc93c1353b9fc6c68b70bc8bb40e60b415401b7..578cf2954a5f03fe705982fe31ef5f1fb035faa9 100644 (file)
@@ -24,8 +24,6 @@
  */
 #define TCG_TARGET_IA64 1
 
-#define TCG_TARGET_REG_BITS 64
-
 /* We only map the first 64 registers */
 #define TCG_TARGET_NB_REGS 64
 enum {
index 43c5501708887a92d792af559fef86c5e808c97d..e2a2571f9aced6002396e319fc01f4cde2f0e42f 100644 (file)
@@ -25,7 +25,6 @@
  */
 #define TCG_TARGET_MIPS 1
 
-#define TCG_TARGET_REG_BITS 32
 #ifdef __MIPSEB__
 # define TCG_TARGET_WORDS_BIGENDIAN
 #endif
index f9a88c4a3a1001db4d2ff191da5a56ad8b5008a7..5c2d61294fde5b26bdeb216ec581e777038290d0 100644 (file)
@@ -23,7 +23,6 @@
  */
 #define TCG_TARGET_PPC 1
 
-#define TCG_TARGET_REG_BITS 32
 #define TCG_TARGET_WORDS_BIGENDIAN
 #define TCG_TARGET_NB_REGS 32
 
index 539513171b2e70d3a8ccdd4a69feb700b6d72959..8d1fb738e4e2299bc273ac739b0068897bea52d7 100644 (file)
@@ -23,7 +23,6 @@
  */
 #define TCG_TARGET_PPC64 1
 
-#define TCG_TARGET_REG_BITS 64
 #define TCG_TARGET_WORDS_BIGENDIAN
 #define TCG_TARGET_NB_REGS 32
 
index 35ebac3a3bcdda79b8cd28bf575d09cc6675839c..e4cd6418a9adb9b6506cbb372365a96eb9a86b57 100644 (file)
  */
 #define TCG_TARGET_S390 1
 
-#ifdef __s390x__
-#define TCG_TARGET_REG_BITS 64
-#else
-#define TCG_TARGET_REG_BITS 32
-#endif
-
 #define TCG_TARGET_WORDS_BIGENDIAN
 
 typedef enum TCGReg {
index 7b4e7f9ed6193e65eec0012740cf36a1a996767f..1464ef40c67f7a7681e43ff0f947813210d7f481 100644 (file)
  */
 #define TCG_TARGET_SPARC 1
 
-#if defined(__sparc_v9__) && !defined(__sparc_v8plus__)
-#define TCG_TARGET_REG_BITS 64
-#else
-#define TCG_TARGET_REG_BITS 32
-#endif
-
 #define TCG_TARGET_WORDS_BIGENDIAN
 
 #define TCG_TARGET_NB_REGS 32