/* Memory locations of particular registers located in PCI(e) IO card */
#define APOIO_RAM_START 0x0
#define APOIO_RAM_SIZE 0x8000
-#define APOIO_LED_PIO 0x8020
-#define APOIO_EMUL_BUS_CTRL 0x8040
-#define APOIO_EMUL_BUS_DATA_OUT 0x8060
-#define APOIO_EMUL_BUS_DATA_IN 0x8080
+#define APOIO_EMUL_BUS_DATA_OUT 0x8020
+#define APOIO_EMUL_BUS_DATA_IN 0x8040
+#define APOIO_EMUL_BUS_CTRL 0x8060
+#define APOIO_LED_PIO 0x8080
/* Decoding of 'fields' in emul_bus_ctrl */
#define APOTERM_ADDR_m (1 | 1 << 1)
-#define APOTERM_RD_m (1 << 2)
+#define APOTERM_CS0_m (1 << 2)
#define APOTERM_WR_m (1 << 3)
-#define APOTERM_CS0_m (1 << 4)
+#define APOTERM_RD_m (1 << 4)
#define APOTERM_PWR_m (1 << 7)
/* Decoding of ADDR0 ADDR1 of emul_bus_ctrl */
/* (WR | CS0): H -> L */
if (wr_en_old && !wr_en_new)
{
+ DEBUG_PRINT("APOTERM_WR addr = %d; val = 0x%02x\n",
+ apoio->emul_bus_ctrl_new & APOTERM_ADDR_m,
+ apoio->emul_bus_data_out);
+
switch (apoio->emul_bus_ctrl_new & APOTERM_ADDR_m) {
case APOTERM_WR_LCD_INST:
apoterm_hd44780(apoio->emul_bus_data_out,
break;
case APOTERM_RD_KBD_RD:
+ apoio->emul_bus_data_in = 0xff;
break;
}
+
+ DEBUG_PRINT("APOTERM_RD addr = %d; val = 0x%02x\n",
+ apoio->emul_bus_ctrl_new & APOTERM_ADDR_m,
+ apoio->emul_bus_data_in);
}
/* (RD | WR | CS0): H -> L