CPUState *cpu = ENV_GET_CPU(env);
cpu->current_tb = NULL;
- siglongjmp(env->jmp_env, 1);
+ siglongjmp(cpu->jmp_env, 1);
}
/* exit the current TB from a signal handler. The host registers are
#if defined(CONFIG_SOFTMMU)
void cpu_resume_from_signal(CPUArchState *env, void *puc)
{
+ CPUState *cpu = ENV_GET_CPU(env);
+
/* XXX: restore cpu registers saved in host registers */
env->exception_index = -1;
- siglongjmp(env->jmp_env, 1);
+ siglongjmp(cpu->jmp_env, 1);
}
#endif
/* prepare setjmp context for exception handling */
for(;;) {
- if (sigsetjmp(env->jmp_env, 0) == 0) {
+ if (sigsetjmp(cpu->jmp_env, 0) == 0) {
/* if an exception is pending, we execute it here */
if (env->exception_index >= 0) {
if (env->exception_index >= EXCP_INTERRUPT) {
#define QEMU_CPU_H
#include <signal.h>
+#include <setjmp.h>
#include "hw/qdev-core.h"
#include "exec/hwaddr.h"
#include "qemu/queue.h"
uint32_t interrupt_request;
int singlestep_enabled;
int64_t icount_extra;
+ sigjmp_buf jmp_env;
AddressSpace *as;
MemoryListener *tcg_as_listener;
*/
void cpu_resume_from_signal(CPUArchState *env1, void *puc)
{
+ CPUState *cpu = ENV_GET_CPU(env1);
#ifdef __linux__
struct ucontext *uc = puc;
#elif defined(__OpenBSD__)
#endif
}
env1->exception_index = -1;
- siglongjmp(env1->jmp_env, 1);
+ siglongjmp(cpu->jmp_env, 1);
}
/* 'pc' is the host PC at which the exception was raised. 'address' is