]> rtime.felk.cvut.cz Git - lisovros/qemu_apohw.git/commitdiff
microblaze: Improve src
authorEdgar E. Iglesias <edgar.iglesias@gmail.com>
Thu, 24 Oct 2013 17:18:28 +0000 (19:18 +0200)
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>
Thu, 24 Oct 2013 20:32:56 +0000 (22:32 +0200)
Microblaze carry is mirrored in MSR[31], pick it directly from
there. Also, no need to mask cpu_R[dc->ra] when calling
write_carry.

15% improvement in linux-user src loops.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
target-microblaze/translate.c

index 93aafac6919e061dbc7235769611d13b02344b8c..232015aa9cb4d773ddd4d1c2ea20bf9cd87ba8a7 100644 (file)
@@ -750,7 +750,7 @@ static void dec_barrel(DisasContext *dc)
 
 static void dec_bit(DisasContext *dc)
 {
-    TCGv t0, t1;
+    TCGv t0;
     unsigned int op;
     int mem_index = cpu_mmu_index(dc->env);
 
@@ -761,19 +761,12 @@ static void dec_bit(DisasContext *dc)
             t0 = tcg_temp_new();
 
             LOG_DIS("src r%d r%d\n", dc->rd, dc->ra);
-            tcg_gen_andi_tl(t0, cpu_R[dc->ra], 1);
+            tcg_gen_andi_tl(t0, cpu_SR[SR_MSR], MSR_CC);
+            write_carry(dc, cpu_R[dc->ra]);
             if (dc->rd) {
-                t1 = tcg_temp_new();
-                read_carry(dc, t1);
-                tcg_gen_shli_tl(t1, t1, 31);
-
                 tcg_gen_shri_tl(cpu_R[dc->rd], cpu_R[dc->ra], 1);
-                tcg_gen_or_tl(cpu_R[dc->rd], cpu_R[dc->rd], t1);
-                tcg_temp_free(t1);
+                tcg_gen_or_tl(cpu_R[dc->rd], cpu_R[dc->rd], t0);
             }
-
-            /* Update carry.  */
-            write_carry(dc, t0);
             tcg_temp_free(t0);
             break;