arch/x86/include/asm/paravirt.h

   1 #ifndef _ASM_X86_PARAVIRT_H
   2 #define _ASM_X86_PARAVIRT_H
   3 /* Various instructions on x86 need to be replaced for
   4  * para-virtualization: those hooks are defined here. */
   5
   6 #ifdef CONFIG_PARAVIRT
   7 #include <asm/pgtable_types.h>
   8 #include <asm/asm.h>
   9
  10 #include <asm/paravirt_types.h>
  11
  12 #ifndef __ASSEMBLY__
  13 #include <linux/types.h>
  14 #include <linux/cpumask.h>
  15
  16 static inline int paravirt_enabled(void)
  17 {
  18         return pv_info.paravirt_enabled;
  19 }
  20
  21 static inline void load_sp0(struct tss_struct *tss,
  22                              struct thread_struct *thread)
  23 {
  24         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
  25 }
  26
  27 /* The paravirtualized CPUID instruction. */
  28 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
  29                            unsigned int *ecx, unsigned int *edx)
  30 {
  31         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
  32 }
  33
  34 /*
  35  * These special macros can be used to get or set a debugging register
  36  */
  37 static inline unsigned long paravirt_get_debugreg(int reg)
  38 {
  39         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
  40 }
  41 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
  42 static inline void set_debugreg(unsigned long val, int reg)
  43 {
  44         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
  45 }
  46
  47 static inline void clts(void)
  48 {
  49         PVOP_VCALL0(pv_cpu_ops.clts);
  50 }
  51
  52 static inline unsigned long read_cr0(void)
  53 {
  54         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
  55 }
  56
  57 static inline void write_cr0(unsigned long x)
  58 {
  59         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
  60 }
  61
  62 static inline unsigned long read_cr2(void)
  63 {
  64         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
  65 }
  66
  67 static inline void write_cr2(unsigned long x)
  68 {
  69         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
  70 }
  71
  72 static inline unsigned long read_cr3(void)
  73 {
  74         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
  75 }
  76
  77 static inline void write_cr3(unsigned long x)
  78 {
  79         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
  80 }
  81
  82 static inline unsigned long read_cr4(void)
  83 {
  84         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
  85 }
  86 static inline unsigned long read_cr4_safe(void)
  87 {
  88         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
  89 }
  90
  91 static inline void write_cr4(unsigned long x)
  92 {
  93         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
  94 }
  95
  96 #ifdef CONFIG_X86_64
  97 static inline unsigned long read_cr8(void)
  98 {
  99         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
 100 }
 101
 102 static inline void write_cr8(unsigned long x)
 103 {
 104         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
 105 }
 106 #endif
 107
 108 static inline void raw_safe_halt(void)
 109 {
 110         PVOP_VCALL0(pv_irq_ops.safe_halt);
 111 }
 112
 113 static inline void halt(void)
 114 {
 115         PVOP_VCALL0(pv_irq_ops.safe_halt);
 116 }
 117
 118 static inline void wbinvd(void)
 119 {
 120         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 121 }
 122
 123 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 124
 125 static inline u64 paravirt_read_msr(unsigned msr, int *err)
 126 {
 127         return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
 128 }
 129 static inline u64 paravirt_read_msr_amd(unsigned msr, int *err)
 130 {
 131         return PVOP_CALL2(u64, pv_cpu_ops.read_msr_amd, msr, err);
 132 }
 133 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
 134 {
 135         return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
 136 }
 137
 138 /* These should all do BUG_ON(_err), but our headers are too tangled. */
 139 #define rdmsr(msr, val1, val2)                  \
 140 do {                                            \
 141         int _err;                               \
 142         u64 _l = paravirt_read_msr(msr, &_err); \
 143         val1 = (u32)_l;                         \
 144         val2 = _l >> 32;                        \
 145 } while (0)
 146
 147 #define wrmsr(msr, val1, val2)                  \
 148 do {                                            \
 149         paravirt_write_msr(msr, val1, val2);    \
 150 } while (0)
 151
 152 #define rdmsrl(msr, val)                        \
 153 do {                                            \
 154         int _err;                               \
 155         val = paravirt_read_msr(msr, &_err);    \
 156 } while (0)
 157
 158 #define wrmsrl(msr, val)        wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
 159 #define wrmsr_safe(msr, a, b)   paravirt_write_msr(msr, a, b)
 160
 161 /* rdmsr with exception handling */
 162 #define rdmsr_safe(msr, a, b)                   \
 163 ({                                              \
 164         int _err;                               \
 165         u64 _l = paravirt_read_msr(msr, &_err); \
 166         (*a) = (u32)_l;                         \
 167         (*b) = _l >> 32;                        \
 168         _err;                                   \
 169 })
 170
 171 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 172 {
 173         int err;
 174
 175         *p = paravirt_read_msr(msr, &err);
 176         return err;
 177 }
 178 static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
 179 {
 180         int err;
 181
 182         *p = paravirt_read_msr_amd(msr, &err);
 183         return err;
 184 }
 185
 186 static inline u64 paravirt_read_tsc(void)
 187 {
 188         return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
 189 }
 190
 191 #define rdtscl(low)                             \
 192 do {                                            \
 193         u64 _l = paravirt_read_tsc();           \
 194         low = (int)_l;                          \
 195 } while (0)
 196
 197 #define rdtscll(val) (val = paravirt_read_tsc())
 198
 199 static inline unsigned long long paravirt_sched_clock(void)
 200 {
 201         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 202 }
 203
 204 static inline unsigned long long paravirt_read_pmc(int counter)
 205 {
 206         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 207 }
 208
 209 #define rdpmc(counter, low, high)               \
 210 do {                                            \
 211         u64 _l = paravirt_read_pmc(counter);    \
 212         low = (u32)_l;                          \
 213         high = _l >> 32;                        \
 214 } while (0)
 215
 216 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
 217 {
 218         return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
 219 }
 220
 221 #define rdtscp(low, high, aux)                          \
 222 do {                                                    \
 223         int __aux;                                      \
 224         unsigned long __val = paravirt_rdtscp(&__aux);  \
 225         (low) = (u32)__val;                             \
 226         (high) = (u32)(__val >> 32);                    \
 227         (aux) = __aux;                                  \
 228 } while (0)
 229
 230 #define rdtscpll(val, aux)                              \
 231 do {                                                    \
 232         unsigned long __aux;                            \
 233         val = paravirt_rdtscp(&__aux);                  \
 234         (aux) = __aux;                                  \
 235 } while (0)
 236
 237 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 238 {
 239         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
 240 }
 241
 242 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 243 {
 244         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
 245 }
 246
 247 static inline void load_TR_desc(void)
 248 {
 249         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 250 }
 251 static inline void load_gdt(const struct desc_ptr *dtr)
 252 {
 253         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 254 }
 255 static inline void load_idt(const struct desc_ptr *dtr)
 256 {
 257         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 258 }
 259 static inline void set_ldt(const void *addr, unsigned entries)
 260 {
 261         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 262 }
 263 static inline void store_gdt(struct desc_ptr *dtr)
 264 {
 265         PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
 266 }
 267 static inline void store_idt(struct desc_ptr *dtr)
 268 {
 269         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
 270 }
 271 static inline unsigned long paravirt_store_tr(void)
 272 {
 273         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 274 }
 275 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 276 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 277 {
 278         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
 279 }
 280
 281 #ifdef CONFIG_X86_64
 282 static inline void load_gs_index(unsigned int gs)
 283 {
 284         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
 285 }
 286 #endif
 287
 288 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 289                                    const void *desc)
 290 {
 291         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
 292 }
 293
 294 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 295                                    void *desc, int type)
 296 {
 297         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
 298 }
 299
 300 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 301 {
 302         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
 303 }
 304 static inline void set_iopl_mask(unsigned mask)
 305 {
 306         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
 307 }
 308
 309 /* The paravirtualized I/O functions */
 310 static inline void slow_down_io(void)
 311 {
 312         pv_cpu_ops.io_delay();
 313 #ifdef REALLY_SLOW_IO
 314         pv_cpu_ops.io_delay();
 315         pv_cpu_ops.io_delay();
 316         pv_cpu_ops.io_delay();
 317 #endif
 318 }
 319
 320 #ifdef CONFIG_SMP
 321 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
 322                                     unsigned long start_esp)
 323 {
 324         PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
 325                     phys_apicid, start_eip, start_esp);
 326 }
 327 #endif
 328
 329 static inline void paravirt_activate_mm(struct mm_struct *prev,
 330                                         struct mm_struct *next)
 331 {
 332         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
 333 }
 334
 335 static inline void arch_dup_mmap(struct mm_struct *oldmm,
 336                                  struct mm_struct *mm)
 337 {
 338         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
 339 }
 340
 341 static inline void arch_exit_mmap(struct mm_struct *mm)
 342 {
 343         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
 344 }
 345
 346 static inline void __flush_tlb(void)
 347 {
 348         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
 349 }
 350 static inline void __flush_tlb_global(void)
 351 {
 352         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
 353 }
 354 static inline void __flush_tlb_single(unsigned long addr)
 355 {
 356         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
 357 }
 358
 359 static inline void flush_tlb_others(const struct cpumask *cpumask,
 360                                     struct mm_struct *mm,
 361                                     unsigned long va)
 362 {
 363         PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, cpumask, mm, va);
 364 }
 365
 366 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 367 {
 368         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
 369 }
 370
 371 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 372 {
 373         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
 374 }
 375
 376 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
 377 {
 378         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
 379 }
 380 static inline void paravirt_release_pte(unsigned long pfn)
 381 {
 382         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
 383 }
 384
 385 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
 386 {
 387         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
 388 }
 389
 390 static inline void paravirt_alloc_pmd_clone(unsigned long pfn, unsigned long clonepfn,
 391                                             unsigned long start, unsigned long count)
 392 {
 393         PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
 394 }
 395 static inline void paravirt_release_pmd(unsigned long pfn)
 396 {
 397         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
 398 }
 399
 400 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
 401 {
 402         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
 403 }
 404 static inline void paravirt_release_pud(unsigned long pfn)
 405 {
 406         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
 407 }
 408
 409 #ifdef CONFIG_HIGHPTE
 410 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
 411 {
 412         unsigned long ret;
 413         ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
 414         return (void *)ret;
 415 }
 416 #endif
 417
 418 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
 419                               pte_t *ptep)
 420 {
 421         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
 422 }
 423
 424 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
 425                                     pte_t *ptep)
 426 {
 427         PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
 428 }
 429
 430 static inline pte_t __pte(pteval_t val)
 431 {
 432         pteval_t ret;
 433
 434         if (sizeof(pteval_t) > sizeof(long))
 435                 ret = PVOP_CALLEE2(pteval_t,
 436                                    pv_mmu_ops.make_pte,
 437                                    val, (u64)val >> 32);
 438         else
 439                 ret = PVOP_CALLEE1(pteval_t,
 440                                    pv_mmu_ops.make_pte,
 441                                    val);
 442
 443         return (pte_t) { .pte = ret };
 444 }
 445
 446 static inline pteval_t pte_val(pte_t pte)
 447 {
 448         pteval_t ret;
 449
 450         if (sizeof(pteval_t) > sizeof(long))
 451                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
 452                                    pte.pte, (u64)pte.pte >> 32);
 453         else
 454                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
 455                                    pte.pte);
 456
 457         return ret;
 458 }
 459
 460 static inline pgd_t __pgd(pgdval_t val)
 461 {
 462         pgdval_t ret;
 463
 464         if (sizeof(pgdval_t) > sizeof(long))
 465                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
 466                                    val, (u64)val >> 32);
 467         else
 468                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
 469                                    val);
 470
 471         return (pgd_t) { ret };
 472 }
 473
 474 static inline pgdval_t pgd_val(pgd_t pgd)
 475 {
 476         pgdval_t ret;
 477
 478         if (sizeof(pgdval_t) > sizeof(long))
 479                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
 480                                     pgd.pgd, (u64)pgd.pgd >> 32);
 481         else
 482                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
 483                                     pgd.pgd);
 484
 485         return ret;
 486 }
 487
 488 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
 489 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
 490                                            pte_t *ptep)
 491 {
 492         pteval_t ret;
 493
 494         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
 495                          mm, addr, ptep);
 496
 497         return (pte_t) { .pte = ret };
 498 }
 499
 500 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
 501                                            pte_t *ptep, pte_t pte)
 502 {
 503         if (sizeof(pteval_t) > sizeof(long))
 504                 /* 5 arg words */
 505                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
 506         else
 507                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
 508                             mm, addr, ptep, pte.pte);
 509 }
 510
 511 static inline void set_pte(pte_t *ptep, pte_t pte)
 512 {
 513         if (sizeof(pteval_t) > sizeof(long))
 514                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
 515                             pte.pte, (u64)pte.pte >> 32);
 516         else
 517                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
 518                             pte.pte);
 519 }
 520
 521 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 522                               pte_t *ptep, pte_t pte)
 523 {
 524         if (sizeof(pteval_t) > sizeof(long))
 525                 /* 5 arg words */
 526                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
 527         else
 528                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
 529 }
 530
 531 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 532 {
 533         pmdval_t val = native_pmd_val(pmd);
 534
 535         if (sizeof(pmdval_t) > sizeof(long))
 536                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
 537         else
 538                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
 539 }
 540
 541 #if PAGETABLE_LEVELS >= 3
 542 static inline pmd_t __pmd(pmdval_t val)
 543 {
 544         pmdval_t ret;
 545
 546         if (sizeof(pmdval_t) > sizeof(long))
 547                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
 548                                    val, (u64)val >> 32);
 549         else
 550                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
 551                                    val);
 552
 553         return (pmd_t) { ret };
 554 }
 555
 556 static inline pmdval_t pmd_val(pmd_t pmd)
 557 {
 558         pmdval_t ret;
 559
 560         if (sizeof(pmdval_t) > sizeof(long))
 561                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
 562                                     pmd.pmd, (u64)pmd.pmd >> 32);
 563         else
 564                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
 565                                     pmd.pmd);
 566
 567         return ret;
 568 }
 569
 570 static inline void set_pud(pud_t *pudp, pud_t pud)
 571 {
 572         pudval_t val = native_pud_val(pud);
 573
 574         if (sizeof(pudval_t) > sizeof(long))
 575                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
 576                             val, (u64)val >> 32);
 577         else
 578                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
 579                             val);
 580 }
 581 #if PAGETABLE_LEVELS == 4
 582 static inline pud_t __pud(pudval_t val)
 583 {
 584         pudval_t ret;
 585
 586         if (sizeof(pudval_t) > sizeof(long))
 587                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
 588                                    val, (u64)val >> 32);
 589         else
 590                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
 591                                    val);
 592
 593         return (pud_t) { ret };
 594 }
 595
 596 static inline pudval_t pud_val(pud_t pud)
 597 {
 598         pudval_t ret;
 599
 600         if (sizeof(pudval_t) > sizeof(long))
 601                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
 602                                     pud.pud, (u64)pud.pud >> 32);
 603         else
 604                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
 605                                     pud.pud);
 606
 607         return ret;
 608 }
 609
 610 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 611 {
 612         pgdval_t val = native_pgd_val(pgd);
 613
 614         if (sizeof(pgdval_t) > sizeof(long))
 615                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
 616                             val, (u64)val >> 32);
 617         else
 618                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
 619                             val);
 620 }
 621
 622 static inline void pgd_clear(pgd_t *pgdp)
 623 {
 624         set_pgd(pgdp, __pgd(0));
 625 }
 626
 627 static inline void pud_clear(pud_t *pudp)
 628 {
 629         set_pud(pudp, __pud(0));
 630 }
 631
 632 #endif  /* PAGETABLE_LEVELS == 4 */
 633
 634 #endif  /* PAGETABLE_LEVELS >= 3 */
 635
 636 #ifdef CONFIG_X86_PAE
 637 /* Special-case pte-setting operations for PAE, which can't update a
 638    64-bit pte atomically */
 639 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 640 {
 641         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
 642                     pte.pte, pte.pte >> 32);
 643 }
 644
 645 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 646                              pte_t *ptep)
 647 {
 648         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
 649 }
 650
 651 static inline void pmd_clear(pmd_t *pmdp)
 652 {
 653         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
 654 }
 655 #else  /* !CONFIG_X86_PAE */
 656 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 657 {
 658         set_pte(ptep, pte);
 659 }
 660
 661 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 662                              pte_t *ptep)
 663 {
 664         set_pte_at(mm, addr, ptep, __pte(0));
 665 }
 666
 667 static inline void pmd_clear(pmd_t *pmdp)
 668 {
 669         set_pmd(pmdp, __pmd(0));
 670 }
 671 #endif  /* CONFIG_X86_PAE */
 672
 673 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
 674 static inline void arch_start_context_switch(struct task_struct *prev)
 675 {
 676         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
 677 }
 678
 679 static inline void arch_end_context_switch(struct task_struct *next)
 680 {
 681         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
 682 }
 683
 684 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 685 static inline void arch_enter_lazy_mmu_mode(void)
 686 {
 687         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
 688 }
 689
 690 static inline void arch_leave_lazy_mmu_mode(void)
 691 {
 692         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
 693 }
 694
 695 void arch_flush_lazy_mmu_mode(void);
 696
 697 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 698                                 phys_addr_t phys, pgprot_t flags)
 699 {
 700         pv_mmu_ops.set_fixmap(idx, phys, flags);
 701 }
 702
 703 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
 704
 705 static inline int __raw_spin_is_locked(struct raw_spinlock *lock)
 706 {
 707         return PVOP_CALL1(int, pv_lock_ops.spin_is_locked, lock);
 708 }
 709
 710 static inline int __raw_spin_is_contended(struct raw_spinlock *lock)
 711 {
 712         return PVOP_CALL1(int, pv_lock_ops.spin_is_contended, lock);
 713 }
 714 #define __raw_spin_is_contended __raw_spin_is_contended
 715
 716 static __always_inline void __raw_spin_lock(struct raw_spinlock *lock)
 717 {
 718         PVOP_VCALL1(pv_lock_ops.spin_lock, lock);
 719 }
 720
 721 static __always_inline void __raw_spin_lock_flags(struct raw_spinlock *lock,
 722                                                   unsigned long flags)
 723 {
 724         PVOP_VCALL2(pv_lock_ops.spin_lock_flags, lock, flags);
 725 }
 726
 727 static __always_inline int __raw_spin_trylock(struct raw_spinlock *lock)
 728 {
 729         return PVOP_CALL1(int, pv_lock_ops.spin_trylock, lock);
 730 }
 731
 732 static __always_inline void __raw_spin_unlock(struct raw_spinlock *lock)
 733 {
 734         PVOP_VCALL1(pv_lock_ops.spin_unlock, lock);
 735 }
 736
 737 #endif
 738
 739 #ifdef CONFIG_X86_32
 740 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
 741 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
 742
 743 /* save and restore all caller-save registers, except return value */
 744 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
 745 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
 746
 747 #define PV_FLAGS_ARG "0"
 748 #define PV_EXTRA_CLOBBERS
 749 #define PV_VEXTRA_CLOBBERS
 750 #else
 751 /* save and restore all caller-save registers, except return value */
 752 #define PV_SAVE_ALL_CALLER_REGS                                         \
 753         "push %rcx;"                                                    \
 754         "push %rdx;"                                                    \
 755         "push %rsi;"                                                    \
 756         "push %rdi;"                                                    \
 757         "push %r8;"                                                     \
 758         "push %r9;"                                                     \
 759         "push %r10;"                                                    \
 760         "push %r11;"
 761 #define PV_RESTORE_ALL_CALLER_REGS                                      \
 762         "pop %r11;"                                                     \
 763         "pop %r10;"                                                     \
 764         "pop %r9;"                                                      \
 765         "pop %r8;"                                                      \
 766         "pop %rdi;"                                                     \
 767         "pop %rsi;"                                                     \
 768         "pop %rdx;"                                                     \
 769         "pop %rcx;"
 770
 771 /* We save some registers, but all of them, that's too much. We clobber all
 772  * caller saved registers but the argument parameter */
 773 #define PV_SAVE_REGS "pushq %%rdi;"
 774 #define PV_RESTORE_REGS "popq %%rdi;"
 775 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
 776 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
 777 #define PV_FLAGS_ARG "D"
 778 #endif
 779
 780 /*
 781  * Generate a thunk around a function which saves all caller-save
 782  * registers except for the return value.  This allows C functions to
 783  * be called from assembler code where fewer than normal registers are
 784  * available.  It may also help code generation around calls from C
 785  * code if the common case doesn't use many registers.
 786  *
 787  * When a callee is wrapped in a thunk, the caller can assume that all
 788  * arg regs and all scratch registers are preserved across the
 789  * call. The return value in rax/eax will not be saved, even for void
 790  * functions.
 791  */
 792 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
 793         extern typeof(func) __raw_callee_save_##func;                   \
 794         static void *__##func##__ __used = func;                        \
 795                                                                         \
 796         asm(".pushsection .text;"                                       \
 797             "__raw_callee_save_" #func ": "                             \
 798             PV_SAVE_ALL_CALLER_REGS                                     \
 799             "call " #func ";"                                           \
 800             PV_RESTORE_ALL_CALLER_REGS                                  \
 801             "ret;"                                                      \
 802             ".popsection")
 803
 804 /* Get a reference to a callee-save function */
 805 #define PV_CALLEE_SAVE(func)                                            \
 806         ((struct paravirt_callee_save) { __raw_callee_save_##func })
 807
 808 /* Promise that "func" already uses the right calling convention */
 809 #define __PV_IS_CALLEE_SAVE(func)                       \
 810         ((struct paravirt_callee_save) { func })
 811
 812 static inline unsigned long __raw_local_save_flags(void)
 813 {
 814         unsigned long f;
 815
 816         asm volatile(paravirt_alt(PARAVIRT_CALL)
 817                      : "=a"(f)
 818                      : paravirt_type(pv_irq_ops.save_fl),
 819                        paravirt_clobber(CLBR_EAX)
 820                      : "memory", "cc");
 821         return f;
 822 }
 823
 824 static inline void raw_local_irq_restore(unsigned long f)
 825 {
 826         asm volatile(paravirt_alt(PARAVIRT_CALL)
 827                      : "=a"(f)
 828                      : PV_FLAGS_ARG(f),
 829                        paravirt_type(pv_irq_ops.restore_fl),
 830                        paravirt_clobber(CLBR_EAX)
 831                      : "memory", "cc");
 832 }
 833
 834 static inline void raw_local_irq_disable(void)
 835 {
 836         asm volatile(paravirt_alt(PARAVIRT_CALL)
 837                      :
 838                      : paravirt_type(pv_irq_ops.irq_disable),
 839                        paravirt_clobber(CLBR_EAX)
 840                      : "memory", "eax", "cc");
 841 }
 842
 843 static inline void raw_local_irq_enable(void)
 844 {
 845         asm volatile(paravirt_alt(PARAVIRT_CALL)
 846                      :
 847                      : paravirt_type(pv_irq_ops.irq_enable),
 848                        paravirt_clobber(CLBR_EAX)
 849                      : "memory", "eax", "cc");
 850 }
 851
 852 static inline unsigned long __raw_local_irq_save(void)
 853 {
 854         unsigned long f;
 855
 856         f = __raw_local_save_flags();
 857         raw_local_irq_disable();
 858         return f;
 859 }
 860
 861
 862 /* Make sure as little as possible of this mess escapes. */
 863 #undef PARAVIRT_CALL
 864 #undef __PVOP_CALL
 865 #undef __PVOP_VCALL
 866 #undef PVOP_VCALL0
 867 #undef PVOP_CALL0
 868 #undef PVOP_VCALL1
 869 #undef PVOP_CALL1
 870 #undef PVOP_VCALL2
 871 #undef PVOP_CALL2
 872 #undef PVOP_VCALL3
 873 #undef PVOP_CALL3
 874 #undef PVOP_VCALL4
 875 #undef PVOP_CALL4
 876
 877 extern void default_banner(void);
 878
 879 #else  /* __ASSEMBLY__ */
 880
 881 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
 882 771:;                                           \
 883         ops;                                    \
 884 772:;                                           \
 885         .pushsection .parainstructions,"a";     \
 886          .align algn;                           \
 887          word 771b;                             \
 888          .byte ptype;                           \
 889          .byte 772b-771b;                       \
 890          .short clobbers;                       \
 891         .popsection
 892
 893
 894 #define COND_PUSH(set, mask, reg)                       \
 895         .if ((~(set)) & mask); push %reg; .endif
 896 #define COND_POP(set, mask, reg)                        \
 897         .if ((~(set)) & mask); pop %reg; .endif
 898
 899 #ifdef CONFIG_X86_64
 900
 901 #define PV_SAVE_REGS(set)                       \
 902         COND_PUSH(set, CLBR_RAX, rax);          \
 903         COND_PUSH(set, CLBR_RCX, rcx);          \
 904         COND_PUSH(set, CLBR_RDX, rdx);          \
 905         COND_PUSH(set, CLBR_RSI, rsi);          \
 906         COND_PUSH(set, CLBR_RDI, rdi);          \
 907         COND_PUSH(set, CLBR_R8, r8);            \
 908         COND_PUSH(set, CLBR_R9, r9);            \
 909         COND_PUSH(set, CLBR_R10, r10);          \
 910         COND_PUSH(set, CLBR_R11, r11)
 911 #define PV_RESTORE_REGS(set)                    \
 912         COND_POP(set, CLBR_R11, r11);           \
 913         COND_POP(set, CLBR_R10, r10);           \
 914         COND_POP(set, CLBR_R9, r9);             \
 915         COND_POP(set, CLBR_R8, r8);             \
 916         COND_POP(set, CLBR_RDI, rdi);           \
 917         COND_POP(set, CLBR_RSI, rsi);           \
 918         COND_POP(set, CLBR_RDX, rdx);           \
 919         COND_POP(set, CLBR_RCX, rcx);           \
 920         COND_POP(set, CLBR_RAX, rax)
 921
 922 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
 923 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
 924 #define PARA_INDIRECT(addr)     *addr(%rip)
 925 #else
 926 #define PV_SAVE_REGS(set)                       \
 927         COND_PUSH(set, CLBR_EAX, eax);          \
 928         COND_PUSH(set, CLBR_EDI, edi);          \
 929         COND_PUSH(set, CLBR_ECX, ecx);          \
 930         COND_PUSH(set, CLBR_EDX, edx)
 931 #define PV_RESTORE_REGS(set)                    \
 932         COND_POP(set, CLBR_EDX, edx);           \
 933         COND_POP(set, CLBR_ECX, ecx);           \
 934         COND_POP(set, CLBR_EDI, edi);           \
 935         COND_POP(set, CLBR_EAX, eax)
 936
 937 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
 938 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
 939 #define PARA_INDIRECT(addr)     *%cs:addr
 940 #endif
 941
 942 #define INTERRUPT_RETURN                                                \
 943         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
 944                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret))
 945
 946 #define DISABLE_INTERRUPTS(clobbers)                                    \
 947         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
 948                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 949                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
 950                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 951
 952 #define ENABLE_INTERRUPTS(clobbers)                                     \
 953         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
 954                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 955                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
 956                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 957
 958 #define USERGS_SYSRET32                                                 \
 959         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret32),       \
 960                   CLBR_NONE,                                            \
 961                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret32))
 962
 963 #ifdef CONFIG_X86_32
 964 #define GET_CR0_INTO_EAX                                \
 965         push %ecx; push %edx;                           \
 966         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
 967         pop %edx; pop %ecx
 968
 969 #define ENABLE_INTERRUPTS_SYSEXIT                                       \
 970         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
 971                   CLBR_NONE,                                            \
 972                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
 973
 974
 975 #else   /* !CONFIG_X86_32 */
 976
 977 /*
 978  * If swapgs is used while the userspace stack is still current,
 979  * there's no way to call a pvop.  The PV replacement *must* be
 980  * inlined, or the swapgs instruction must be trapped and emulated.
 981  */
 982 #define SWAPGS_UNSAFE_STACK                                             \
 983         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
 984                   swapgs)
 985
 986 /*
 987  * Note: swapgs is very special, and in practise is either going to be
 988  * implemented with a single "swapgs" instruction or something very
 989  * special.  Either way, we don't need to save any registers for
 990  * it.
 991  */
 992 #define SWAPGS                                                          \
 993         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
 994                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs)          \
 995                  )
 996
 997 #define GET_CR2_INTO_RCX                                \
 998         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2); \
 999         movq %rax, %rcx;                                \
1000         xorq %rax, %rax;
1001
1002 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
1003         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
1004                   CLBR_NONE,                                            \
1005                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
1006
1007 #define USERGS_SYSRET64                                                 \
1008         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
1009                   CLBR_NONE,                                            \
1010                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64))
1011
1012 #define ENABLE_INTERRUPTS_SYSEXIT32                                     \
1013         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_sysexit),    \
1014                   CLBR_NONE,                                            \
1015                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_irq_enable_sysexit))
1016 #endif  /* CONFIG_X86_32 */
1017
1018 #endif /* __ASSEMBLY__ */
1019 #else  /* CONFIG_PARAVIRT */
1020 # define default_banner x86_init_noop
1021 #endif /* !CONFIG_PARAVIRT */
1022 #endif /* _ASM_X86_PARAVIRT_H */