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1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * wlanfae <wlanfae@realtek.com>
23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24  * Hsinchu 300, Taiwan.
25  *
26  * Larry Finger <Larry.Finger@lwfinger.net>
27  *
28  *****************************************************************************/
29
30 #include "wifi.h"
31 #include "core.h"
32 #include "pci.h"
33 #include "base.h"
34 #include "ps.h"
35 #include "efuse.h"
36 #include <linux/export.h>
37
38 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
39         PCI_VENDOR_ID_INTEL,
40         PCI_VENDOR_ID_ATI,
41         PCI_VENDOR_ID_AMD,
42         PCI_VENDOR_ID_SI
43 };
44
45 static const u8 ac_to_hwq[] = {
46         VO_QUEUE,
47         VI_QUEUE,
48         BE_QUEUE,
49         BK_QUEUE
50 };
51
52 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
53                        struct sk_buff *skb)
54 {
55         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
56         __le16 fc = rtl_get_fc(skb);
57         u8 queue_index = skb_get_queue_mapping(skb);
58
59         if (unlikely(ieee80211_is_beacon(fc)))
60                 return BEACON_QUEUE;
61         if (ieee80211_is_mgmt(fc))
62                 return MGNT_QUEUE;
63         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
64                 if (ieee80211_is_nullfunc(fc))
65                         return HIGH_QUEUE;
66
67         return ac_to_hwq[queue_index];
68 }
69
70 /* Update PCI dependent default settings*/
71 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
72 {
73         struct rtl_priv *rtlpriv = rtl_priv(hw);
74         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
75         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
76         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
77         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
78         u8 init_aspm;
79
80         ppsc->reg_rfps_level = 0;
81         ppsc->support_aspm = false;
82
83         /*Update PCI ASPM setting */
84         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
85         switch (rtlpci->const_pci_aspm) {
86         case 0:
87                 /*No ASPM */
88                 break;
89
90         case 1:
91                 /*ASPM dynamically enabled/disable. */
92                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
93                 break;
94
95         case 2:
96                 /*ASPM with Clock Req dynamically enabled/disable. */
97                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
98                                          RT_RF_OFF_LEVL_CLK_REQ);
99                 break;
100
101         case 3:
102                 /*
103                  * Always enable ASPM and Clock Req
104                  * from initialization to halt.
105                  * */
106                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
107                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
108                                          RT_RF_OFF_LEVL_CLK_REQ);
109                 break;
110
111         case 4:
112                 /*
113                  * Always enable ASPM without Clock Req
114                  * from initialization to halt.
115                  * */
116                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
117                                           RT_RF_OFF_LEVL_CLK_REQ);
118                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
119                 break;
120         }
121
122         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
123
124         /*Update Radio OFF setting */
125         switch (rtlpci->const_hwsw_rfoff_d3) {
126         case 1:
127                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
128                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
129                 break;
130
131         case 2:
132                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
133                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
134                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
135                 break;
136
137         case 3:
138                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
139                 break;
140         }
141
142         /*Set HW definition to determine if it supports ASPM. */
143         switch (rtlpci->const_support_pciaspm) {
144         case 0:{
145                         /*Not support ASPM. */
146                         bool support_aspm = false;
147                         ppsc->support_aspm = support_aspm;
148                         break;
149                 }
150         case 1:{
151                         /*Support ASPM. */
152                         bool support_aspm = true;
153                         bool support_backdoor = true;
154                         ppsc->support_aspm = support_aspm;
155
156                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
157                            !priv->ndis_adapter.amd_l1_patch)
158                            support_backdoor = false; */
159
160                         ppsc->support_backdoor = support_backdoor;
161
162                         break;
163                 }
164         case 2:
165                 /*ASPM value set by chipset. */
166                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
167                         bool support_aspm = true;
168                         ppsc->support_aspm = support_aspm;
169                 }
170                 break;
171         default:
172                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
173                          "switch case not processed\n");
174                 break;
175         }
176
177         /* toshiba aspm issue, toshiba will set aspm selfly
178          * so we should not set aspm in driver */
179         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
180         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
181                 init_aspm == 0x43)
182                 ppsc->support_aspm = false;
183 }
184
185 static bool _rtl_pci_platform_switch_device_pci_aspm(
186                         struct ieee80211_hw *hw,
187                         u8 value)
188 {
189         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
190         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
191
192         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
193                 value |= 0x40;
194
195         pci_write_config_byte(rtlpci->pdev, 0x80, value);
196
197         return false;
198 }
199
200 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
201 static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
202 {
203         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
204         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
205
206         pci_write_config_byte(rtlpci->pdev, 0x81, value);
207
208         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
209                 udelay(100);
210
211         return true;
212 }
213
214 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
215 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
216 {
217         struct rtl_priv *rtlpriv = rtl_priv(hw);
218         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
219         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
220         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
221         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
222         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
223         /*Retrieve original configuration settings. */
224         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
225         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
226                                 pcibridge_linkctrlreg;
227         u16 aspmlevel = 0;
228         u8 tmp_u1b = 0;
229
230         if (!ppsc->support_aspm)
231                 return;
232
233         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
234                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
235                          "PCI(Bridge) UNKNOWN\n");
236
237                 return;
238         }
239
240         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
241                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
242                 _rtl_pci_switch_clk_req(hw, 0x0);
243         }
244
245         /*for promising device will in L0 state after an I/O. */
246         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
247
248         /*Set corresponding value. */
249         aspmlevel |= BIT(0) | BIT(1);
250         linkctrl_reg &= ~aspmlevel;
251         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
252
253         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
254         udelay(50);
255
256         /*4 Disable Pci Bridge ASPM */
257         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
258                               pcibridge_linkctrlreg);
259
260         udelay(50);
261 }
262
263 /*
264  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
265  *power saving We should follow the sequence to enable
266  *RTL8192SE first then enable Pci Bridge ASPM
267  *or the system will show bluescreen.
268  */
269 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
270 {
271         struct rtl_priv *rtlpriv = rtl_priv(hw);
272         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
273         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
274         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
275         u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
276         u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
277         u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
278         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
279         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
280         u16 aspmlevel;
281         u8 u_pcibridge_aspmsetting;
282         u8 u_device_aspmsetting;
283
284         if (!ppsc->support_aspm)
285                 return;
286
287         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
288                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
289                          "PCI(Bridge) UNKNOWN\n");
290                 return;
291         }
292
293         /*4 Enable Pci Bridge ASPM */
294
295         u_pcibridge_aspmsetting =
296             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
297             rtlpci->const_hostpci_aspm_setting;
298
299         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
300                 u_pcibridge_aspmsetting &= ~BIT(0);
301
302         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
303                               u_pcibridge_aspmsetting);
304
305         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
306                  "PlatformEnableASPM():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
307                  pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
308                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
309                  u_pcibridge_aspmsetting);
310
311         udelay(50);
312
313         /*Get ASPM level (with/without Clock Req) */
314         aspmlevel = rtlpci->const_devicepci_aspm_setting;
315         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
316
317         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
318         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
319
320         u_device_aspmsetting |= aspmlevel;
321
322         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
323
324         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
325                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
326                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
327                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
328         }
329         udelay(100);
330 }
331
332 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
333 {
334         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
335
336         bool status = false;
337         u8 offset_e0;
338         unsigned offset_e4;
339
340         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
341
342         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
343
344         if (offset_e0 == 0xA0) {
345                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
346                 if (offset_e4 & BIT(23))
347                         status = true;
348         }
349
350         return status;
351 }
352
353 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
354 {
355         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
356         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
357         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
358         u8 linkctrl_reg;
359         u8 num4bbytes;
360
361         num4bbytes = (capabilityoffset + 0x10) / 4;
362
363         /*Read  Link Control Register */
364         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
365
366         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
367 }
368
369 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
370                 struct ieee80211_hw *hw)
371 {
372         struct rtl_priv *rtlpriv = rtl_priv(hw);
373         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
374
375         u8 tmp;
376         int pos;
377         u8 linkctrl_reg;
378
379         /*Link Control Register */
380         pos = pci_pcie_cap(pdev);
381         pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
382         pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
383
384         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
385                  pcipriv->ndis_adapter.linkctrl_reg);
386
387         pci_read_config_byte(pdev, 0x98, &tmp);
388         tmp |= BIT(4);
389         pci_write_config_byte(pdev, 0x98, tmp);
390
391         tmp = 0x17;
392         pci_write_config_byte(pdev, 0x70f, tmp);
393 }
394
395 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
396 {
397         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
398
399         _rtl_pci_update_default_setting(hw);
400
401         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
402                 /*Always enable ASPM & Clock Req. */
403                 rtl_pci_enable_aspm(hw);
404                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
405         }
406
407 }
408
409 static void _rtl_pci_io_handler_init(struct device *dev,
410                                      struct ieee80211_hw *hw)
411 {
412         struct rtl_priv *rtlpriv = rtl_priv(hw);
413
414         rtlpriv->io.dev = dev;
415
416         rtlpriv->io.write8_async = pci_write8_async;
417         rtlpriv->io.write16_async = pci_write16_async;
418         rtlpriv->io.write32_async = pci_write32_async;
419
420         rtlpriv->io.read8_sync = pci_read8_sync;
421         rtlpriv->io.read16_sync = pci_read16_sync;
422         rtlpriv->io.read32_sync = pci_read32_sync;
423
424 }
425
426 static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
427 {
428 }
429
430 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
431                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
432 {
433         struct rtl_priv *rtlpriv = rtl_priv(hw);
434         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
435         u8 additionlen = FCS_LEN;
436         struct sk_buff *next_skb;
437
438         /* here open is 4, wep/tkip is 8, aes is 12*/
439         if (info->control.hw_key)
440                 additionlen += info->control.hw_key->icv_len;
441
442         /* The most skb num is 6 */
443         tcb_desc->empkt_num = 0;
444         spin_lock_bh(&rtlpriv->locks.waitq_lock);
445         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
446                 struct ieee80211_tx_info *next_info;
447
448                 next_info = IEEE80211_SKB_CB(next_skb);
449                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
450                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
451                                 next_skb->len + additionlen;
452                         tcb_desc->empkt_num++;
453                 } else {
454                         break;
455                 }
456
457                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
458                                       next_skb))
459                         break;
460
461                 if (tcb_desc->empkt_num >= 5)
462                         break;
463         }
464         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
465
466         return true;
467 }
468
469 /* just for early mode now */
470 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
471 {
472         struct rtl_priv *rtlpriv = rtl_priv(hw);
473         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
474         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
475         struct sk_buff *skb = NULL;
476         struct ieee80211_tx_info *info = NULL;
477         int tid;
478
479         if (!rtlpriv->rtlhal.earlymode_enable)
480                 return;
481
482         /* we juse use em for BE/BK/VI/VO */
483         for (tid = 7; tid >= 0; tid--) {
484                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
485                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
486                 while (!mac->act_scanning &&
487                        rtlpriv->psc.rfpwr_state == ERFON) {
488                         struct rtl_tcb_desc tcb_desc;
489                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
490
491                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
492                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
493                            (ring->entries - skb_queue_len(&ring->queue) > 5)) {
494                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
495                         } else {
496                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
497                                 break;
498                         }
499                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
500
501                         /* Some macaddr can't do early mode. like
502                          * multicast/broadcast/no_qos data */
503                         info = IEEE80211_SKB_CB(skb);
504                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
505                                 _rtl_update_earlymode_info(hw, skb,
506                                                            &tcb_desc, tid);
507
508                         rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
509                 }
510         }
511 }
512
513
514 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
515 {
516         struct rtl_priv *rtlpriv = rtl_priv(hw);
517         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
518
519         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
520
521         while (skb_queue_len(&ring->queue)) {
522                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
523                 struct sk_buff *skb;
524                 struct ieee80211_tx_info *info;
525                 __le16 fc;
526                 u8 tid;
527
528                 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
529                                                           HW_DESC_OWN);
530
531                 /*
532                  *beacon packet will only use the first
533                  *descriptor defautly,and the own may not
534                  *be cleared by the hardware
535                  */
536                 if (own)
537                         return;
538                 ring->idx = (ring->idx + 1) % ring->entries;
539
540                 skb = __skb_dequeue(&ring->queue);
541                 pci_unmap_single(rtlpci->pdev,
542                                  rtlpriv->cfg->ops->
543                                              get_desc((u8 *) entry, true,
544                                                       HW_DESC_TXBUFF_ADDR),
545                                  skb->len, PCI_DMA_TODEVICE);
546
547                 /* remove early mode header */
548                 if (rtlpriv->rtlhal.earlymode_enable)
549                         skb_pull(skb, EM_HDR_LEN);
550
551                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
552                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
553                          ring->idx,
554                          skb_queue_len(&ring->queue),
555                          *(u16 *) (skb->data + 22));
556
557                 if (prio == TXCMD_QUEUE) {
558                         dev_kfree_skb(skb);
559                         goto tx_status_ok;
560
561                 }
562
563                 /* for sw LPS, just after NULL skb send out, we can
564                  * sure AP kown we are sleeped, our we should not let
565                  * rf to sleep*/
566                 fc = rtl_get_fc(skb);
567                 if (ieee80211_is_nullfunc(fc)) {
568                         if (ieee80211_has_pm(fc)) {
569                                 rtlpriv->mac80211.offchan_delay = true;
570                                 rtlpriv->psc.state_inap = true;
571                         } else {
572                                 rtlpriv->psc.state_inap = false;
573                         }
574                 }
575
576                 /* update tid tx pkt num */
577                 tid = rtl_get_tid(skb);
578                 if (tid <= 7)
579                         rtlpriv->link_info.tidtx_inperiod[tid]++;
580
581                 info = IEEE80211_SKB_CB(skb);
582                 ieee80211_tx_info_clear_status(info);
583
584                 info->flags |= IEEE80211_TX_STAT_ACK;
585                 /*info->status.rates[0].count = 1; */
586
587                 ieee80211_tx_status_irqsafe(hw, skb);
588
589                 if ((ring->entries - skb_queue_len(&ring->queue))
590                                 == 2) {
591
592                         RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
593                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%d\n",
594                                  prio, ring->idx,
595                                  skb_queue_len(&ring->queue));
596
597                         ieee80211_wake_queue(hw,
598                                         skb_get_queue_mapping
599                                         (skb));
600                 }
601 tx_status_ok:
602                 skb = NULL;
603         }
604
605         if (((rtlpriv->link_info.num_rx_inperiod +
606                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
607                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
608                 schedule_work(&rtlpriv->works.lps_leave_work);
609         }
610 }
611
612 static void _rtl_receive_one(struct ieee80211_hw *hw, struct sk_buff *skb,
613                              struct ieee80211_rx_status rx_status)
614 {
615         struct rtl_priv *rtlpriv = rtl_priv(hw);
616         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
617         __le16 fc = rtl_get_fc(skb);
618         bool unicast = false;
619         struct sk_buff *uskb = NULL;
620         u8 *pdata;
621
622
623         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
624
625         if (is_broadcast_ether_addr(hdr->addr1)) {
626                 ;/*TODO*/
627         } else if (is_multicast_ether_addr(hdr->addr1)) {
628                 ;/*TODO*/
629         } else {
630                 unicast = true;
631                 rtlpriv->stats.rxbytesunicast += skb->len;
632         }
633
634         rtl_is_special_data(hw, skb, false);
635
636         if (ieee80211_is_data(fc)) {
637                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
638
639                 if (unicast)
640                         rtlpriv->link_info.num_rx_inperiod++;
641         }
642
643         /* for sw lps */
644         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
645         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
646         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
647             (rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G) &&
648              (ieee80211_is_beacon(fc) || ieee80211_is_probe_resp(fc)))
649                 return;
650
651         if (unlikely(!rtl_action_proc(hw, skb, false)))
652                 return;
653
654         uskb = dev_alloc_skb(skb->len + 128);
655         if (!uskb)
656                 return;         /* exit if allocation failed */
657         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status, sizeof(rx_status));
658         pdata = (u8 *)skb_put(uskb, skb->len);
659         memcpy(pdata, skb->data, skb->len);
660
661         ieee80211_rx_irqsafe(hw, uskb);
662 }
663
664 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
665 {
666         struct rtl_priv *rtlpriv = rtl_priv(hw);
667         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
668         int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
669
670         struct ieee80211_rx_status rx_status = { 0 };
671         unsigned int count = rtlpci->rxringcount;
672         u8 own;
673         u8 tmp_one;
674         u32 bufferaddress;
675
676         struct rtl_stats stats = {
677                 .signal = 0,
678                 .noise = -98,
679                 .rate = 0,
680         };
681         int index = rtlpci->rx_ring[rx_queue_idx].idx;
682
683         /*RX NORMAL PKT */
684         while (count--) {
685                 /*rx descriptor */
686                 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
687                                 index];
688                 /*rx pkt */
689                 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
690                                 index];
691                 struct sk_buff *new_skb = NULL;
692
693                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
694                                                        false, HW_DESC_OWN);
695
696                 /*wait data to be filled by hardware */
697                 if (own)
698                         break;
699
700                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
701                                                  &rx_status,
702                                                  (u8 *) pdesc, skb);
703
704                 if (stats.crc || stats.hwerror)
705                         goto done;
706
707                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
708                 if (unlikely(!new_skb)) {
709                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV), DBG_DMESG,
710                                  "can't alloc skb for rx\n");
711                         goto done;
712                 }
713
714                 pci_unmap_single(rtlpci->pdev,
715                                  *((dma_addr_t *) skb->cb),
716                                  rtlpci->rxbuffersize,
717                                  PCI_DMA_FROMDEVICE);
718
719                 skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc, false,
720                         HW_DESC_RXPKT_LEN));
721                 skb_reserve(skb, stats.rx_drvinfo_size + stats.rx_bufshift);
722
723                 /*
724                  * NOTICE This can not be use for mac80211,
725                  * this is done in mac80211 code,
726                  * if you done here sec DHCP will fail
727                  * skb_trim(skb, skb->len - 4);
728                  */
729
730                 _rtl_receive_one(hw, skb, rx_status);
731
732                 if (((rtlpriv->link_info.num_rx_inperiod +
733                         rtlpriv->link_info.num_tx_inperiod) > 8) ||
734                         (rtlpriv->link_info.num_rx_inperiod > 2)) {
735                         schedule_work(&rtlpriv->works.lps_leave_work);
736                 }
737
738                 dev_kfree_skb_any(skb);
739                 skb = new_skb;
740
741                 rtlpci->rx_ring[rx_queue_idx].rx_buf[index] = skb;
742                 *((dma_addr_t *) skb->cb) =
743                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
744                                            rtlpci->rxbuffersize,
745                                            PCI_DMA_FROMDEVICE);
746
747 done:
748                 bufferaddress = (*((dma_addr_t *)skb->cb));
749                 tmp_one = 1;
750                 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
751                                             HW_DESC_RXBUFF_ADDR,
752                                             (u8 *)&bufferaddress);
753                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
754                                             HW_DESC_RXPKT_LEN,
755                                             (u8 *)&rtlpci->rxbuffersize);
756
757                 if (index == rtlpci->rxringcount - 1)
758                         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
759                                                     HW_DESC_RXERO,
760                                                     (u8 *)&tmp_one);
761
762                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
763                                             (u8 *)&tmp_one);
764
765                 index = (index + 1) % rtlpci->rxringcount;
766         }
767
768         rtlpci->rx_ring[rx_queue_idx].idx = index;
769 }
770
771 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
772 {
773         struct ieee80211_hw *hw = dev_id;
774         struct rtl_priv *rtlpriv = rtl_priv(hw);
775         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
776         unsigned long flags;
777         u32 inta = 0;
778         u32 intb = 0;
779         irqreturn_t ret = IRQ_HANDLED;
780
781         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
782
783         /*read ISR: 4/8bytes */
784         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
785
786         /*Shared IRQ or HW disappared */
787         if (!inta || inta == 0xffff) {
788                 ret = IRQ_NONE;
789                 goto done;
790         }
791
792         /*<1> beacon related */
793         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
794                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
795                          "beacon ok interrupt!\n");
796         }
797
798         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
799                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
800                          "beacon err interrupt!\n");
801         }
802
803         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
804                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
805         }
806
807         if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
808                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
809                          "prepare beacon for interrupt!\n");
810                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
811         }
812
813         /*<3> Tx related */
814         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
815                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
816
817         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
818                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
819                          "Manage ok interrupt!\n");
820                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
821         }
822
823         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
824                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
825                          "HIGH_QUEUE ok interrupt!\n");
826                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
827         }
828
829         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
830                 rtlpriv->link_info.num_tx_inperiod++;
831
832                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
833                          "BK Tx OK interrupt!\n");
834                 _rtl_pci_tx_isr(hw, BK_QUEUE);
835         }
836
837         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
838                 rtlpriv->link_info.num_tx_inperiod++;
839
840                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
841                          "BE TX OK interrupt!\n");
842                 _rtl_pci_tx_isr(hw, BE_QUEUE);
843         }
844
845         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
846                 rtlpriv->link_info.num_tx_inperiod++;
847
848                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
849                          "VI TX OK interrupt!\n");
850                 _rtl_pci_tx_isr(hw, VI_QUEUE);
851         }
852
853         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
854                 rtlpriv->link_info.num_tx_inperiod++;
855
856                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
857                          "Vo TX OK interrupt!\n");
858                 _rtl_pci_tx_isr(hw, VO_QUEUE);
859         }
860
861         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
862                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
863                         rtlpriv->link_info.num_tx_inperiod++;
864
865                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
866                                  "CMD TX OK interrupt!\n");
867                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
868                 }
869         }
870
871         /*<2> Rx related */
872         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
873                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
874                 _rtl_pci_rx_interrupt(hw);
875         }
876
877         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
878                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
879                          "rx descriptor unavailable!\n");
880                 _rtl_pci_rx_interrupt(hw);
881         }
882
883         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
884                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
885                 _rtl_pci_rx_interrupt(hw);
886         }
887
888         if (rtlpriv->rtlhal.earlymode_enable)
889                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
890
891 done:
892         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
893         return ret;
894 }
895
896 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
897 {
898         _rtl_pci_tx_chk_waitq(hw);
899 }
900
901 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
902 {
903         struct rtl_priv *rtlpriv = rtl_priv(hw);
904         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
905         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
906         struct rtl8192_tx_ring *ring = NULL;
907         struct ieee80211_hdr *hdr = NULL;
908         struct ieee80211_tx_info *info = NULL;
909         struct sk_buff *pskb = NULL;
910         struct rtl_tx_desc *pdesc = NULL;
911         struct rtl_tcb_desc tcb_desc;
912         u8 temp_one = 1;
913
914         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
915         ring = &rtlpci->tx_ring[BEACON_QUEUE];
916         pskb = __skb_dequeue(&ring->queue);
917         if (pskb)
918                 kfree_skb(pskb);
919
920         /*NB: the beacon data buffer must be 32-bit aligned. */
921         pskb = ieee80211_beacon_get(hw, mac->vif);
922         if (pskb == NULL)
923                 return;
924         hdr = rtl_get_hdr(pskb);
925         info = IEEE80211_SKB_CB(pskb);
926         pdesc = &ring->desc[0];
927         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
928                 info, pskb, BEACON_QUEUE, &tcb_desc);
929
930         __skb_queue_tail(&ring->queue, pskb);
931
932         rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
933                                     (u8 *)&temp_one);
934
935         return;
936 }
937
938 static void rtl_lps_leave_work_callback(struct work_struct *work)
939 {
940         struct rtl_works *rtlworks =
941             container_of(work, struct rtl_works, lps_leave_work);
942         struct ieee80211_hw *hw = rtlworks->hw;
943
944         rtl_lps_leave(hw);
945 }
946
947 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
948 {
949         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
950         u8 i;
951
952         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
953                 rtlpci->txringcount[i] = RT_TXDESC_NUM;
954
955         /*
956          *we just alloc 2 desc for beacon queue,
957          *because we just need first desc in hw beacon.
958          */
959         rtlpci->txringcount[BEACON_QUEUE] = 2;
960
961         /*
962          *BE queue need more descriptor for performance
963          *consideration or, No more tx desc will happen,
964          *and may cause mac80211 mem leakage.
965          */
966         rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
967
968         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
969         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
970 }
971
972 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
973                 struct pci_dev *pdev)
974 {
975         struct rtl_priv *rtlpriv = rtl_priv(hw);
976         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
977         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
978         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
979
980         rtlpci->up_first_time = true;
981         rtlpci->being_init_adapter = false;
982
983         rtlhal->hw = hw;
984         rtlpci->pdev = pdev;
985
986         /*Tx/Rx related var */
987         _rtl_pci_init_trx_var(hw);
988
989         /*IBSS*/ mac->beacon_interval = 100;
990
991         /*AMPDU*/
992         mac->min_space_cfg = 0;
993         mac->max_mss_density = 0;
994         /*set sane AMPDU defaults */
995         mac->current_ampdu_density = 7;
996         mac->current_ampdu_factor = 3;
997
998         /*QOS*/
999         rtlpci->acm_method = eAcmWay2_SW;
1000
1001         /*task */
1002         tasklet_init(&rtlpriv->works.irq_tasklet,
1003                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1004                      (unsigned long)hw);
1005         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1006                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1007                      (unsigned long)hw);
1008         INIT_WORK(&rtlpriv->works.lps_leave_work, rtl_lps_leave_work_callback);
1009 }
1010
1011 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1012                                  unsigned int prio, unsigned int entries)
1013 {
1014         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1015         struct rtl_priv *rtlpriv = rtl_priv(hw);
1016         struct rtl_tx_desc *ring;
1017         dma_addr_t dma;
1018         u32 nextdescaddress;
1019         int i;
1020
1021         ring = pci_alloc_consistent(rtlpci->pdev,
1022                                     sizeof(*ring) * entries, &dma);
1023
1024         if (!ring || (unsigned long)ring & 0xFF) {
1025                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1026                          "Cannot allocate TX ring (prio = %d)\n", prio);
1027                 return -ENOMEM;
1028         }
1029
1030         memset(ring, 0, sizeof(*ring) * entries);
1031         rtlpci->tx_ring[prio].desc = ring;
1032         rtlpci->tx_ring[prio].dma = dma;
1033         rtlpci->tx_ring[prio].idx = 0;
1034         rtlpci->tx_ring[prio].entries = entries;
1035         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1036
1037         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1038                  prio, ring);
1039
1040         for (i = 0; i < entries; i++) {
1041                 nextdescaddress = (u32) dma +
1042                                               ((i + 1) % entries) *
1043                                               sizeof(*ring);
1044
1045                 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1046                                             true, HW_DESC_TX_NEXTDESC_ADDR,
1047                                             (u8 *)&nextdescaddress);
1048         }
1049
1050         return 0;
1051 }
1052
1053 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1054 {
1055         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1056         struct rtl_priv *rtlpriv = rtl_priv(hw);
1057         struct rtl_rx_desc *entry = NULL;
1058         int i, rx_queue_idx;
1059         u8 tmp_one = 1;
1060
1061         /*
1062          *rx_queue_idx 0:RX_MPDU_QUEUE
1063          *rx_queue_idx 1:RX_CMD_QUEUE
1064          */
1065         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1066              rx_queue_idx++) {
1067                 rtlpci->rx_ring[rx_queue_idx].desc =
1068                     pci_alloc_consistent(rtlpci->pdev,
1069                                          sizeof(*rtlpci->rx_ring[rx_queue_idx].
1070                                                 desc) * rtlpci->rxringcount,
1071                                          &rtlpci->rx_ring[rx_queue_idx].dma);
1072
1073                 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1074                     (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1075                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1076                                  "Cannot allocate RX ring\n");
1077                         return -ENOMEM;
1078                 }
1079
1080                 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1081                        sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1082                        rtlpci->rxringcount);
1083
1084                 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1085
1086                 /* If amsdu_8k is disabled, set buffersize to 4096. This
1087                  * change will reduce memory fragmentation.
1088                  */
1089                 if (rtlpci->rxbuffersize > 4096 &&
1090                     rtlpriv->rtlhal.disable_amsdu_8k)
1091                         rtlpci->rxbuffersize = 4096;
1092
1093                 for (i = 0; i < rtlpci->rxringcount; i++) {
1094                         struct sk_buff *skb =
1095                             dev_alloc_skb(rtlpci->rxbuffersize);
1096                         u32 bufferaddress;
1097                         if (!skb)
1098                                 return 0;
1099                         entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1100
1101                         /*skb->dev = dev; */
1102
1103                         rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1104
1105                         /*
1106                          *just set skb->cb to mapping addr
1107                          *for pci_unmap_single use
1108                          */
1109                         *((dma_addr_t *) skb->cb) =
1110                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1111                                            rtlpci->rxbuffersize,
1112                                            PCI_DMA_FROMDEVICE);
1113
1114                         bufferaddress = (*((dma_addr_t *)skb->cb));
1115                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1116                                                     HW_DESC_RXBUFF_ADDR,
1117                                                     (u8 *)&bufferaddress);
1118                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1119                                                     HW_DESC_RXPKT_LEN,
1120                                                     (u8 *)&rtlpci->
1121                                                     rxbuffersize);
1122                         rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1123                                                     HW_DESC_RXOWN,
1124                                                     (u8 *)&tmp_one);
1125                 }
1126
1127                 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1128                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1129         }
1130         return 0;
1131 }
1132
1133 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1134                 unsigned int prio)
1135 {
1136         struct rtl_priv *rtlpriv = rtl_priv(hw);
1137         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1138         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1139
1140         while (skb_queue_len(&ring->queue)) {
1141                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1142                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1143
1144                 pci_unmap_single(rtlpci->pdev,
1145                                  rtlpriv->cfg->
1146                                              ops->get_desc((u8 *) entry, true,
1147                                                    HW_DESC_TXBUFF_ADDR),
1148                                  skb->len, PCI_DMA_TODEVICE);
1149                 kfree_skb(skb);
1150                 ring->idx = (ring->idx + 1) % ring->entries;
1151         }
1152
1153         pci_free_consistent(rtlpci->pdev,
1154                             sizeof(*ring->desc) * ring->entries,
1155                             ring->desc, ring->dma);
1156         ring->desc = NULL;
1157 }
1158
1159 static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1160 {
1161         int i, rx_queue_idx;
1162
1163         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1164         /*rx_queue_idx 1:RX_CMD_QUEUE */
1165         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1166              rx_queue_idx++) {
1167                 for (i = 0; i < rtlpci->rxringcount; i++) {
1168                         struct sk_buff *skb =
1169                             rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1170                         if (!skb)
1171                                 continue;
1172
1173                         pci_unmap_single(rtlpci->pdev,
1174                                          *((dma_addr_t *) skb->cb),
1175                                          rtlpci->rxbuffersize,
1176                                          PCI_DMA_FROMDEVICE);
1177                         kfree_skb(skb);
1178                 }
1179
1180                 pci_free_consistent(rtlpci->pdev,
1181                                     sizeof(*rtlpci->rx_ring[rx_queue_idx].
1182                                            desc) * rtlpci->rxringcount,
1183                                     rtlpci->rx_ring[rx_queue_idx].desc,
1184                                     rtlpci->rx_ring[rx_queue_idx].dma);
1185                 rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1186         }
1187 }
1188
1189 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1190 {
1191         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1192         int ret;
1193         int i;
1194
1195         ret = _rtl_pci_init_rx_ring(hw);
1196         if (ret)
1197                 return ret;
1198
1199         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1200                 ret = _rtl_pci_init_tx_ring(hw, i,
1201                                  rtlpci->txringcount[i]);
1202                 if (ret)
1203                         goto err_free_rings;
1204         }
1205
1206         return 0;
1207
1208 err_free_rings:
1209         _rtl_pci_free_rx_ring(rtlpci);
1210
1211         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1212                 if (rtlpci->tx_ring[i].desc)
1213                         _rtl_pci_free_tx_ring(hw, i);
1214
1215         return 1;
1216 }
1217
1218 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1219 {
1220         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1221         u32 i;
1222
1223         /*free rx rings */
1224         _rtl_pci_free_rx_ring(rtlpci);
1225
1226         /*free tx rings */
1227         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1228                 _rtl_pci_free_tx_ring(hw, i);
1229
1230         return 0;
1231 }
1232
1233 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1234 {
1235         struct rtl_priv *rtlpriv = rtl_priv(hw);
1236         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1237         int i, rx_queue_idx;
1238         unsigned long flags;
1239         u8 tmp_one = 1;
1240
1241         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1242         /*rx_queue_idx 1:RX_CMD_QUEUE */
1243         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1244              rx_queue_idx++) {
1245                 /*
1246                  *force the rx_ring[RX_MPDU_QUEUE/
1247                  *RX_CMD_QUEUE].idx to the first one
1248                  */
1249                 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1250                         struct rtl_rx_desc *entry = NULL;
1251
1252                         for (i = 0; i < rtlpci->rxringcount; i++) {
1253                                 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1254                                 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1255                                                             false,
1256                                                             HW_DESC_RXOWN,
1257                                                             (u8 *)&tmp_one);
1258                         }
1259                         rtlpci->rx_ring[rx_queue_idx].idx = 0;
1260                 }
1261         }
1262
1263         /*
1264          *after reset, release previous pending packet,
1265          *and force the  tx idx to the first one
1266          */
1267         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1268         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1269                 if (rtlpci->tx_ring[i].desc) {
1270                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1271
1272                         while (skb_queue_len(&ring->queue)) {
1273                                 struct rtl_tx_desc *entry =
1274                                     &ring->desc[ring->idx];
1275                                 struct sk_buff *skb =
1276                                     __skb_dequeue(&ring->queue);
1277
1278                                 pci_unmap_single(rtlpci->pdev,
1279                                                  rtlpriv->cfg->ops->
1280                                                          get_desc((u8 *)
1281                                                          entry,
1282                                                          true,
1283                                                          HW_DESC_TXBUFF_ADDR),
1284                                                  skb->len, PCI_DMA_TODEVICE);
1285                                 kfree_skb(skb);
1286                                 ring->idx = (ring->idx + 1) % ring->entries;
1287                         }
1288                         ring->idx = 0;
1289                 }
1290         }
1291
1292         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1293
1294         return 0;
1295 }
1296
1297 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1298                                         struct sk_buff *skb)
1299 {
1300         struct rtl_priv *rtlpriv = rtl_priv(hw);
1301         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1302         struct ieee80211_sta *sta = info->control.sta;
1303         struct rtl_sta_info *sta_entry = NULL;
1304         u8 tid = rtl_get_tid(skb);
1305
1306         if (!sta)
1307                 return false;
1308         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1309
1310         if (!rtlpriv->rtlhal.earlymode_enable)
1311                 return false;
1312         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1313                 return false;
1314         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1315                 return false;
1316         if (tid > 7)
1317                 return false;
1318
1319         /* maybe every tid should be checked */
1320         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1321                 return false;
1322
1323         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1324         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1325         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1326
1327         return true;
1328 }
1329
1330 static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1331                 struct rtl_tcb_desc *ptcb_desc)
1332 {
1333         struct rtl_priv *rtlpriv = rtl_priv(hw);
1334         struct rtl_sta_info *sta_entry = NULL;
1335         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1336         struct ieee80211_sta *sta = info->control.sta;
1337         struct rtl8192_tx_ring *ring;
1338         struct rtl_tx_desc *pdesc;
1339         u8 idx;
1340         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1341         unsigned long flags;
1342         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1343         __le16 fc = rtl_get_fc(skb);
1344         u8 *pda_addr = hdr->addr1;
1345         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1346         /*ssn */
1347         u8 tid = 0;
1348         u16 seq_number = 0;
1349         u8 own;
1350         u8 temp_one = 1;
1351
1352         if (ieee80211_is_auth(fc)) {
1353                 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, "MAC80211_LINKING\n");
1354                 rtl_ips_nic_on(hw);
1355         }
1356
1357         if (rtlpriv->psc.sw_ps_enabled) {
1358                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1359                         !ieee80211_has_pm(fc))
1360                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1361         }
1362
1363         rtl_action_proc(hw, skb, true);
1364
1365         if (is_multicast_ether_addr(pda_addr))
1366                 rtlpriv->stats.txbytesmulticast += skb->len;
1367         else if (is_broadcast_ether_addr(pda_addr))
1368                 rtlpriv->stats.txbytesbroadcast += skb->len;
1369         else
1370                 rtlpriv->stats.txbytesunicast += skb->len;
1371
1372         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1373         ring = &rtlpci->tx_ring[hw_queue];
1374         if (hw_queue != BEACON_QUEUE)
1375                 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1376                                 ring->entries;
1377         else
1378                 idx = 0;
1379
1380         pdesc = &ring->desc[idx];
1381         own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1382                         true, HW_DESC_OWN);
1383
1384         if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1385                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1386                          "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%d\n",
1387                          hw_queue, ring->idx, idx,
1388                          skb_queue_len(&ring->queue));
1389
1390                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1391                 return skb->len;
1392         }
1393
1394         if (ieee80211_is_data_qos(fc)) {
1395                 tid = rtl_get_tid(skb);
1396                 if (sta) {
1397                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1398                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1399                                       IEEE80211_SCTL_SEQ) >> 4;
1400                         seq_number += 1;
1401
1402                         if (!ieee80211_has_morefrags(hdr->frame_control))
1403                                 sta_entry->tids[tid].seq_number = seq_number;
1404                 }
1405         }
1406
1407         if (ieee80211_is_data(fc))
1408                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1409
1410         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1411                         info, skb, hw_queue, ptcb_desc);
1412
1413         __skb_queue_tail(&ring->queue, skb);
1414
1415         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1416                                     HW_DESC_OWN, (u8 *)&temp_one);
1417
1418
1419         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1420             hw_queue != BEACON_QUEUE) {
1421
1422                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1423                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%d\n",
1424                          hw_queue, ring->idx, idx,
1425                          skb_queue_len(&ring->queue));
1426
1427                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1428         }
1429
1430         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1431
1432         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1433
1434         return 0;
1435 }
1436
1437 static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1438 {
1439         struct rtl_priv *rtlpriv = rtl_priv(hw);
1440         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1441         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1442         u16 i = 0;
1443         int queue_id;
1444         struct rtl8192_tx_ring *ring;
1445
1446         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1447                 u32 queue_len;
1448                 ring = &pcipriv->dev.tx_ring[queue_id];
1449                 queue_len = skb_queue_len(&ring->queue);
1450                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1451                         queue_id == TXCMD_QUEUE) {
1452                         queue_id--;
1453                         continue;
1454                 } else {
1455                         msleep(20);
1456                         i++;
1457                 }
1458
1459                 /* we just wait 1s for all queues */
1460                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1461                         is_hal_stop(rtlhal) || i >= 200)
1462                         return;
1463         }
1464 }
1465
1466 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1467 {
1468         struct rtl_priv *rtlpriv = rtl_priv(hw);
1469         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1470
1471         _rtl_pci_deinit_trx_ring(hw);
1472
1473         synchronize_irq(rtlpci->pdev->irq);
1474         tasklet_kill(&rtlpriv->works.irq_tasklet);
1475         cancel_work_sync(&rtlpriv->works.lps_leave_work);
1476
1477         flush_workqueue(rtlpriv->works.rtl_wq);
1478         destroy_workqueue(rtlpriv->works.rtl_wq);
1479
1480 }
1481
1482 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1483 {
1484         struct rtl_priv *rtlpriv = rtl_priv(hw);
1485         int err;
1486
1487         _rtl_pci_init_struct(hw, pdev);
1488
1489         err = _rtl_pci_init_trx_ring(hw);
1490         if (err) {
1491                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1492                          "tx ring initialization failed\n");
1493                 return err;
1494         }
1495
1496         return 0;
1497 }
1498
1499 static int rtl_pci_start(struct ieee80211_hw *hw)
1500 {
1501         struct rtl_priv *rtlpriv = rtl_priv(hw);
1502         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1503         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1504         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1505
1506         int err;
1507
1508         rtl_pci_reset_trx_ring(hw);
1509
1510         rtlpci->driver_is_goingto_unload = false;
1511         err = rtlpriv->cfg->ops->hw_init(hw);
1512         if (err) {
1513                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1514                          "Failed to config hardware!\n");
1515                 return err;
1516         }
1517
1518         rtlpriv->cfg->ops->enable_interrupt(hw);
1519         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1520
1521         rtl_init_rx_config(hw);
1522
1523         /*should be after adapter start and interrupt enable. */
1524         set_hal_start(rtlhal);
1525
1526         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1527
1528         rtlpci->up_first_time = false;
1529
1530         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "OK\n");
1531         return 0;
1532 }
1533
1534 static void rtl_pci_stop(struct ieee80211_hw *hw)
1535 {
1536         struct rtl_priv *rtlpriv = rtl_priv(hw);
1537         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1538         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1539         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1540         unsigned long flags;
1541         u8 RFInProgressTimeOut = 0;
1542
1543         /*
1544          *should be before disable interrupt&adapter
1545          *and will do it immediately.
1546          */
1547         set_hal_stop(rtlhal);
1548
1549         rtlpriv->cfg->ops->disable_interrupt(hw);
1550         cancel_work_sync(&rtlpriv->works.lps_leave_work);
1551
1552         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1553         while (ppsc->rfchange_inprogress) {
1554                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1555                 if (RFInProgressTimeOut > 100) {
1556                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1557                         break;
1558                 }
1559                 mdelay(1);
1560                 RFInProgressTimeOut++;
1561                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1562         }
1563         ppsc->rfchange_inprogress = true;
1564         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1565
1566         rtlpci->driver_is_goingto_unload = true;
1567         rtlpriv->cfg->ops->hw_disable(hw);
1568         /* some things are not needed if firmware not available */
1569         if (!rtlpriv->max_fw_size)
1570                 return;
1571         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1572
1573         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1574         ppsc->rfchange_inprogress = false;
1575         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1576
1577         rtl_pci_enable_aspm(hw);
1578 }
1579
1580 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1581                 struct ieee80211_hw *hw)
1582 {
1583         struct rtl_priv *rtlpriv = rtl_priv(hw);
1584         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1585         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1586         struct pci_dev *bridge_pdev = pdev->bus->self;
1587         u16 venderid;
1588         u16 deviceid;
1589         u8 revisionid;
1590         u16 irqline;
1591         u8 tmp;
1592
1593         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1594         venderid = pdev->vendor;
1595         deviceid = pdev->device;
1596         pci_read_config_byte(pdev, 0x8, &revisionid);
1597         pci_read_config_word(pdev, 0x3C, &irqline);
1598
1599         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1600          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1601          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1602          * the correct driver is r8192e_pci, thus this routine should
1603          * return false.
1604          */
1605         if (deviceid == RTL_PCI_8192SE_DID &&
1606             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1607                 return false;
1608
1609         if (deviceid == RTL_PCI_8192_DID ||
1610             deviceid == RTL_PCI_0044_DID ||
1611             deviceid == RTL_PCI_0047_DID ||
1612             deviceid == RTL_PCI_8192SE_DID ||
1613             deviceid == RTL_PCI_8174_DID ||
1614             deviceid == RTL_PCI_8173_DID ||
1615             deviceid == RTL_PCI_8172_DID ||
1616             deviceid == RTL_PCI_8171_DID) {
1617                 switch (revisionid) {
1618                 case RTL_PCI_REVISION_ID_8192PCIE:
1619                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1620                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1621                                  venderid, deviceid);
1622                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1623                         break;
1624                 case RTL_PCI_REVISION_ID_8192SE:
1625                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1626                                  "8192SE is found - vid/did=%x/%x\n",
1627                                  venderid, deviceid);
1628                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1629                         break;
1630                 default:
1631                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1632                                  "Err: Unknown device - vid/did=%x/%x\n",
1633                                  venderid, deviceid);
1634                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1635                         break;
1636
1637                 }
1638         } else if (deviceid == RTL_PCI_8192CET_DID ||
1639                    deviceid == RTL_PCI_8192CE_DID ||
1640                    deviceid == RTL_PCI_8191CE_DID ||
1641                    deviceid == RTL_PCI_8188CE_DID) {
1642                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1643                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1644                          "8192C PCI-E is found - vid/did=%x/%x\n",
1645                          venderid, deviceid);
1646         } else if (deviceid == RTL_PCI_8192DE_DID ||
1647                    deviceid == RTL_PCI_8192DE_DID2) {
1648                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1649                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1650                          "8192D PCI-E is found - vid/did=%x/%x\n",
1651                          venderid, deviceid);
1652         } else {
1653                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1654                          "Err: Unknown device - vid/did=%x/%x\n",
1655                          venderid, deviceid);
1656
1657                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1658         }
1659
1660         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1661                 if (revisionid == 0 || revisionid == 1) {
1662                         if (revisionid == 0) {
1663                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1664                                          "Find 92DE MAC0\n");
1665                                 rtlhal->interfaceindex = 0;
1666                         } else if (revisionid == 1) {
1667                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1668                                          "Find 92DE MAC1\n");
1669                                 rtlhal->interfaceindex = 1;
1670                         }
1671                 } else {
1672                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1673                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
1674                                  venderid, deviceid, revisionid);
1675                         rtlhal->interfaceindex = 0;
1676                 }
1677         }
1678         /*find bus info */
1679         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1680         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1681         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1682
1683         if (bridge_pdev) {
1684                 /*find bridge info if available */
1685                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1686                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1687                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1688                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1689                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1690                                          "Pci Bridge Vendor is found index: %d\n",
1691                                          tmp);
1692                                 break;
1693                         }
1694                 }
1695         }
1696
1697         if (pcipriv->ndis_adapter.pcibridge_vendor !=
1698                 PCI_BRIDGE_VENDOR_UNKNOWN) {
1699                 pcipriv->ndis_adapter.pcibridge_busnum =
1700                     bridge_pdev->bus->number;
1701                 pcipriv->ndis_adapter.pcibridge_devnum =
1702                     PCI_SLOT(bridge_pdev->devfn);
1703                 pcipriv->ndis_adapter.pcibridge_funcnum =
1704                     PCI_FUNC(bridge_pdev->devfn);
1705                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1706                     pci_pcie_cap(bridge_pdev);
1707                 pcipriv->ndis_adapter.num4bytes =
1708                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1709
1710                 rtl_pci_get_linkcontrol_field(hw);
1711
1712                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1713                     PCI_BRIDGE_VENDOR_AMD) {
1714                         pcipriv->ndis_adapter.amd_l1_patch =
1715                             rtl_pci_get_amd_l1_patch(hw);
1716                 }
1717         }
1718
1719         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1720                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
1721                  pcipriv->ndis_adapter.busnumber,
1722                  pcipriv->ndis_adapter.devnumber,
1723                  pcipriv->ndis_adapter.funcnumber,
1724                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
1725
1726         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1727                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1728                  pcipriv->ndis_adapter.pcibridge_busnum,
1729                  pcipriv->ndis_adapter.pcibridge_devnum,
1730                  pcipriv->ndis_adapter.pcibridge_funcnum,
1731                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1732                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1733                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1734                  pcipriv->ndis_adapter.amd_l1_patch);
1735
1736         rtl_pci_parse_configuration(pdev, hw);
1737
1738         return true;
1739 }
1740
1741 int __devinit rtl_pci_probe(struct pci_dev *pdev,
1742                             const struct pci_device_id *id)
1743 {
1744         struct ieee80211_hw *hw = NULL;
1745
1746         struct rtl_priv *rtlpriv = NULL;
1747         struct rtl_pci_priv *pcipriv = NULL;
1748         struct rtl_pci *rtlpci;
1749         unsigned long pmem_start, pmem_len, pmem_flags;
1750         int err;
1751
1752         err = pci_enable_device(pdev);
1753         if (err) {
1754                 RT_ASSERT(false, "%s : Cannot enable new PCI device\n",
1755                           pci_name(pdev));
1756                 return err;
1757         }
1758
1759         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1760                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1761                         RT_ASSERT(false,
1762                                   "Unable to obtain 32bit DMA for consistent allocations\n");
1763                         pci_disable_device(pdev);
1764                         return -ENOMEM;
1765                 }
1766         }
1767
1768         pci_set_master(pdev);
1769
1770         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1771                                 sizeof(struct rtl_priv), &rtl_ops);
1772         if (!hw) {
1773                 RT_ASSERT(false,
1774                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
1775                 err = -ENOMEM;
1776                 goto fail1;
1777         }
1778
1779         SET_IEEE80211_DEV(hw, &pdev->dev);
1780         pci_set_drvdata(pdev, hw);
1781
1782         rtlpriv = hw->priv;
1783         pcipriv = (void *)rtlpriv->priv;
1784         pcipriv->dev.pdev = pdev;
1785         init_completion(&rtlpriv->firmware_loading_complete);
1786
1787         /* init cfg & intf_ops */
1788         rtlpriv->rtlhal.interface = INTF_PCI;
1789         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1790         rtlpriv->intf_ops = &rtl_pci_ops;
1791
1792         /*
1793          *init dbgp flags before all
1794          *other functions, because we will
1795          *use it in other funtions like
1796          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1797          *you can not use these macro
1798          *before this
1799          */
1800         rtl_dbgp_flag_init(hw);
1801
1802         /* MEM map */
1803         err = pci_request_regions(pdev, KBUILD_MODNAME);
1804         if (err) {
1805                 RT_ASSERT(false, "Can't obtain PCI resources\n");
1806                 goto fail2;
1807         }
1808
1809         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1810         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1811         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1812
1813         /*shared mem start */
1814         rtlpriv->io.pci_mem_start =
1815                         (unsigned long)pci_iomap(pdev,
1816                         rtlpriv->cfg->bar_id, pmem_len);
1817         if (rtlpriv->io.pci_mem_start == 0) {
1818                 RT_ASSERT(false, "Can't map PCI mem\n");
1819                 goto fail2;
1820         }
1821
1822         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1823                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
1824                  pmem_start, pmem_len, pmem_flags,
1825                  rtlpriv->io.pci_mem_start);
1826
1827         /* Disable Clk Request */
1828         pci_write_config_byte(pdev, 0x81, 0);
1829         /* leave D3 mode */
1830         pci_write_config_byte(pdev, 0x44, 0);
1831         pci_write_config_byte(pdev, 0x04, 0x06);
1832         pci_write_config_byte(pdev, 0x04, 0x07);
1833
1834         /* find adapter */
1835         if (!_rtl_pci_find_adapter(pdev, hw))
1836                 goto fail3;
1837
1838         /* Init IO handler */
1839         _rtl_pci_io_handler_init(&pdev->dev, hw);
1840
1841         /*like read eeprom and so on */
1842         rtlpriv->cfg->ops->read_eeprom_info(hw);
1843
1844         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1845                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Can't init_sw_vars\n");
1846                 goto fail3;
1847         }
1848
1849         rtlpriv->cfg->ops->init_sw_leds(hw);
1850
1851         /*aspm */
1852         rtl_pci_init_aspm(hw);
1853
1854         /* Init mac80211 sw */
1855         err = rtl_init_core(hw);
1856         if (err) {
1857                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1858                          "Can't allocate sw for mac80211\n");
1859                 goto fail3;
1860         }
1861
1862         /* Init PCI sw */
1863         err = rtl_pci_init(hw, pdev);
1864         if (err) {
1865                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Failed to init PCI\n");
1866                 goto fail3;
1867         }
1868
1869         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1870         if (err) {
1871                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1872                          "failed to create sysfs device attributes\n");
1873                 goto fail3;
1874         }
1875
1876         rtlpci = rtl_pcidev(pcipriv);
1877         err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1878                           IRQF_SHARED, KBUILD_MODNAME, hw);
1879         if (err) {
1880                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1881                          "%s: failed to register IRQ handler\n",
1882                          wiphy_name(hw->wiphy));
1883                 goto fail3;
1884         }
1885         rtlpci->irq_alloc = 1;
1886
1887         return 0;
1888
1889 fail3:
1890         pci_set_drvdata(pdev, NULL);
1891         rtl_deinit_core(hw);
1892         _rtl_pci_io_handler_release(hw);
1893
1894         if (rtlpriv->io.pci_mem_start != 0)
1895                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1896
1897 fail2:
1898         pci_release_regions(pdev);
1899         complete(&rtlpriv->firmware_loading_complete);
1900
1901 fail1:
1902
1903         pci_disable_device(pdev);
1904
1905         return -ENODEV;
1906
1907 }
1908 EXPORT_SYMBOL(rtl_pci_probe);
1909
1910 void rtl_pci_disconnect(struct pci_dev *pdev)
1911 {
1912         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1913         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1914         struct rtl_priv *rtlpriv = rtl_priv(hw);
1915         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
1916         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
1917
1918         /* just in case driver is removed before firmware callback */
1919         wait_for_completion(&rtlpriv->firmware_loading_complete);
1920         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1921
1922         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
1923
1924         /*ieee80211_unregister_hw will call ops_stop */
1925         if (rtlmac->mac80211_registered == 1) {
1926                 ieee80211_unregister_hw(hw);
1927                 rtlmac->mac80211_registered = 0;
1928         } else {
1929                 rtl_deinit_deferred_work(hw);
1930                 rtlpriv->intf_ops->adapter_stop(hw);
1931         }
1932
1933         /*deinit rfkill */
1934         rtl_deinit_rfkill(hw);
1935
1936         rtl_pci_deinit(hw);
1937         rtl_deinit_core(hw);
1938         _rtl_pci_io_handler_release(hw);
1939         rtlpriv->cfg->ops->deinit_sw_vars(hw);
1940
1941         if (rtlpci->irq_alloc) {
1942                 free_irq(rtlpci->pdev->irq, hw);
1943                 rtlpci->irq_alloc = 0;
1944         }
1945
1946         if (rtlpriv->io.pci_mem_start != 0) {
1947                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1948                 pci_release_regions(pdev);
1949         }
1950
1951         pci_disable_device(pdev);
1952
1953         rtl_pci_disable_aspm(hw);
1954
1955         pci_set_drvdata(pdev, NULL);
1956
1957         ieee80211_free_hw(hw);
1958 }
1959 EXPORT_SYMBOL(rtl_pci_disconnect);
1960
1961 /***************************************
1962 kernel pci power state define:
1963 PCI_D0         ((pci_power_t __force) 0)
1964 PCI_D1         ((pci_power_t __force) 1)
1965 PCI_D2         ((pci_power_t __force) 2)
1966 PCI_D3hot      ((pci_power_t __force) 3)
1967 PCI_D3cold     ((pci_power_t __force) 4)
1968 PCI_UNKNOWN    ((pci_power_t __force) 5)
1969
1970 This function is called when system
1971 goes into suspend state mac80211 will
1972 call rtl_mac_stop() from the mac80211
1973 suspend function first, So there is
1974 no need to call hw_disable here.
1975 ****************************************/
1976 int rtl_pci_suspend(struct device *dev)
1977 {
1978         struct pci_dev *pdev = to_pci_dev(dev);
1979         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1980         struct rtl_priv *rtlpriv = rtl_priv(hw);
1981
1982         rtlpriv->cfg->ops->hw_suspend(hw);
1983         rtl_deinit_rfkill(hw);
1984
1985         return 0;
1986 }
1987 EXPORT_SYMBOL(rtl_pci_suspend);
1988
1989 int rtl_pci_resume(struct device *dev)
1990 {
1991         struct pci_dev *pdev = to_pci_dev(dev);
1992         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1993         struct rtl_priv *rtlpriv = rtl_priv(hw);
1994
1995         rtlpriv->cfg->ops->hw_resume(hw);
1996         rtl_init_rfkill(hw);
1997         return 0;
1998 }
1999 EXPORT_SYMBOL(rtl_pci_resume);
2000
2001 struct rtl_intf_ops rtl_pci_ops = {
2002         .read_efuse_byte = read_efuse_byte,
2003         .adapter_start = rtl_pci_start,
2004         .adapter_stop = rtl_pci_stop,
2005         .adapter_tx = rtl_pci_tx,
2006         .flush = rtl_pci_flush,
2007         .reset_trx_ring = rtl_pci_reset_trx_ring,
2008         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2009
2010         .disable_aspm = rtl_pci_disable_aspm,
2011         .enable_aspm = rtl_pci_enable_aspm,
2012 };