4 #include <linux/workqueue.h>
6 #define PCI_CFG_SPACE_SIZE 256
7 #define PCI_CFG_SPACE_EXP_SIZE 4096
9 /* Functions internal to the PCI core code */
11 extern int pci_uevent(struct device *dev, struct kobj_uevent_env *env);
12 extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
13 extern void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
15 static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
17 static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
20 extern void pci_create_firmware_label_files(struct pci_dev *pdev);
21 extern void pci_remove_firmware_label_files(struct pci_dev *pdev);
23 extern void pci_cleanup_rom(struct pci_dev *dev);
26 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
27 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
29 extern int pci_mmap_fits(struct pci_dev *pdev, int resno,
30 struct vm_area_struct *vmai,
31 enum pci_mmap_api mmap_api);
33 int pci_probe_reset_function(struct pci_dev *dev);
36 * struct pci_platform_pm_ops - Firmware PM callbacks
38 * @is_manageable: returns 'true' if given device is power manageable by the
41 * @set_state: invokes the platform firmware to set the device's power state
43 * @choose_state: returns PCI power state of given device preferred by the
44 * platform; to be used during system-wide transitions from a
45 * sleeping state to the working state and vice versa
47 * @can_wakeup: returns 'true' if given device is capable of waking up the
48 * system from a sleeping state
50 * @sleep_wake: enables/disables the system wake up capability of given device
52 * @run_wake: enables/disables the platform to generate run-time wake-up events
53 * for given device (the device's wake-up capability has to be
54 * enabled by @sleep_wake for this feature to work)
56 * If given platform is generally capable of power managing PCI devices, all of
57 * these callbacks are mandatory.
59 struct pci_platform_pm_ops {
60 bool (*is_manageable)(struct pci_dev *dev);
61 int (*set_state)(struct pci_dev *dev, pci_power_t state);
62 pci_power_t (*choose_state)(struct pci_dev *dev);
63 bool (*can_wakeup)(struct pci_dev *dev);
64 int (*sleep_wake)(struct pci_dev *dev, bool enable);
65 int (*run_wake)(struct pci_dev *dev, bool enable);
68 extern int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
69 extern void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
70 extern void pci_disable_enabled_device(struct pci_dev *dev);
71 extern bool pci_check_pme_status(struct pci_dev *dev);
72 extern int pci_finish_runtime_suspend(struct pci_dev *dev);
73 extern void pci_wakeup_event(struct pci_dev *dev);
74 extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
75 extern void pci_pme_wakeup_bus(struct pci_bus *bus);
76 extern void pci_pm_init(struct pci_dev *dev);
77 extern void platform_pci_wakeup_init(struct pci_dev *dev);
78 extern void pci_allocate_cap_save_buffers(struct pci_dev *dev);
80 static inline bool pci_is_bridge(struct pci_dev *pci_dev)
82 return !!(pci_dev->subordinate);
85 extern int pci_user_read_config_byte(struct pci_dev *dev, int where, u8 *val);
86 extern int pci_user_read_config_word(struct pci_dev *dev, int where, u16 *val);
87 extern int pci_user_read_config_dword(struct pci_dev *dev, int where, u32 *val);
88 extern int pci_user_write_config_byte(struct pci_dev *dev, int where, u8 val);
89 extern int pci_user_write_config_word(struct pci_dev *dev, int where, u16 val);
90 extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val);
93 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
94 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
95 void (*release)(struct pci_dev *dev);
100 const struct pci_vpd_ops *ops;
101 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
104 extern int pci_vpd_pci22_init(struct pci_dev *dev);
105 static inline void pci_vpd_release(struct pci_dev *dev)
108 dev->vpd->ops->release(dev);
111 /* PCI /proc functions */
112 #ifdef CONFIG_PROC_FS
113 extern int pci_proc_attach_device(struct pci_dev *dev);
114 extern int pci_proc_detach_device(struct pci_dev *dev);
115 extern int pci_proc_detach_bus(struct pci_bus *bus);
117 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
118 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
119 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
122 /* Functions for PCI Hotplug drivers to use */
123 extern unsigned int pci_do_scan_bus(struct pci_bus *bus);
125 #ifdef HAVE_PCI_LEGACY
126 extern void pci_create_legacy_files(struct pci_bus *bus);
127 extern void pci_remove_legacy_files(struct pci_bus *bus);
129 static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
130 static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
133 /* Lock for read/write access to pci device and bus lists */
134 extern struct rw_semaphore pci_bus_sem;
136 extern unsigned int pci_pm_d3_delay;
138 #ifdef CONFIG_PCI_MSI
139 void pci_no_msi(void);
140 extern void pci_msi_init_pci_dev(struct pci_dev *dev);
142 static inline void pci_no_msi(void) { }
143 static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
146 #ifdef CONFIG_PCIEAER
147 void pci_no_aer(void);
148 bool pci_aer_available(void);
150 static inline void pci_no_aer(void) { }
151 static inline bool pci_aer_available(void) { return false; }
154 static inline int pci_no_d1d2(struct pci_dev *dev)
156 unsigned int parent_dstates = 0;
159 parent_dstates = dev->bus->self->no_d1d2;
160 return (dev->no_d1d2 || parent_dstates);
163 extern struct device_attribute pci_dev_attrs[];
164 extern struct device_attribute dev_attr_cpuaffinity;
165 extern struct device_attribute dev_attr_cpulistaffinity;
166 #ifdef CONFIG_HOTPLUG
167 extern struct bus_attribute pci_bus_attrs[];
169 #define pci_bus_attrs NULL
174 * pci_match_one_device - Tell if a PCI device structure has a matching
175 * PCI device id structure
176 * @id: single PCI device id structure to match
177 * @dev: the PCI device structure to match against
179 * Returns the matching pci_device_id structure or %NULL if there is no match.
181 static inline const struct pci_device_id *
182 pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
184 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
185 (id->device == PCI_ANY_ID || id->device == dev->device) &&
186 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
187 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
188 !((id->class ^ dev->class) & id->class_mask))
193 struct pci_dev *pci_find_upstream_pcie_bridge(struct pci_dev *pdev);
195 /* PCI slot sysfs helper code */
196 #define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
198 extern struct kset *pci_slots_kset;
200 struct pci_slot_attribute {
201 struct attribute attr;
202 ssize_t (*show)(struct pci_slot *, char *);
203 ssize_t (*store)(struct pci_slot *, const char *, size_t);
205 #define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
208 pci_bar_unknown, /* Standard PCI BAR probe */
209 pci_bar_io, /* An io port BAR */
210 pci_bar_mem32, /* A 32-bit memory BAR */
211 pci_bar_mem64, /* A 64-bit memory BAR */
214 extern int pci_setup_device(struct pci_dev *dev);
215 extern int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
216 struct resource *res, unsigned int reg);
217 extern int pci_resource_bar(struct pci_dev *dev, int resno,
218 enum pci_bar_type *type);
219 extern int pci_bus_add_child(struct pci_bus *bus);
220 extern void pci_enable_ari(struct pci_dev *dev);
222 * pci_ari_enabled - query ARI forwarding status
225 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
227 static inline int pci_ari_enabled(struct pci_bus *bus)
229 return bus->self && bus->self->ari_enabled;
232 #ifdef CONFIG_PCI_QUIRKS
233 extern int pci_is_reassigndev(struct pci_dev *dev);
234 resource_size_t pci_specified_resource_alignment(struct pci_dev *dev);
235 extern void pci_disable_bridge_window(struct pci_dev *dev);
238 /* Single Root I/O Virtualization */
240 int pos; /* capability position */
241 int nres; /* number of resources */
242 u32 cap; /* SR-IOV Capabilities */
243 u16 ctrl; /* SR-IOV Control */
244 u16 total; /* total VFs associated with the PF */
245 u16 initial; /* initial VFs associated with the PF */
246 u16 nr_virtfn; /* number of VFs available */
247 u16 offset; /* first VF Routing ID offset */
248 u16 stride; /* following VF stride */
249 u32 pgsz; /* page size for BAR alignment */
250 u8 link; /* Function Dependency Link */
251 struct pci_dev *dev; /* lowest numbered PF */
252 struct pci_dev *self; /* this PF */
253 struct mutex lock; /* lock for VF bus */
254 struct work_struct mtask; /* VF Migration task */
255 u8 __iomem *mstate; /* VF Migration State Array */
258 /* Address Translation Service */
260 int pos; /* capability position */
261 int stu; /* Smallest Translation Unit */
262 int qdep; /* Invalidate Queue Depth */
263 int ref_cnt; /* Physical Function reference count */
264 unsigned int is_enabled:1; /* Enable bit is set */
267 #ifdef CONFIG_PCI_IOV
268 extern int pci_iov_init(struct pci_dev *dev);
269 extern void pci_iov_release(struct pci_dev *dev);
270 extern int pci_iov_resource_bar(struct pci_dev *dev, int resno,
271 enum pci_bar_type *type);
272 extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev,
274 extern void pci_restore_iov_state(struct pci_dev *dev);
275 extern int pci_iov_bus_range(struct pci_bus *bus);
277 extern int pci_enable_ats(struct pci_dev *dev, int ps);
278 extern void pci_disable_ats(struct pci_dev *dev);
279 extern int pci_ats_queue_depth(struct pci_dev *dev);
281 * pci_ats_enabled - query the ATS status
282 * @dev: the PCI device
284 * Returns 1 if ATS capability is enabled, or 0 if not.
286 static inline int pci_ats_enabled(struct pci_dev *dev)
288 return dev->ats && dev->ats->is_enabled;
291 static inline int pci_iov_init(struct pci_dev *dev)
295 static inline void pci_iov_release(struct pci_dev *dev)
299 static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
300 enum pci_bar_type *type)
304 static inline void pci_restore_iov_state(struct pci_dev *dev)
307 static inline int pci_iov_bus_range(struct pci_bus *bus)
312 static inline int pci_enable_ats(struct pci_dev *dev, int ps)
316 static inline void pci_disable_ats(struct pci_dev *dev)
319 static inline int pci_ats_queue_depth(struct pci_dev *dev)
323 static inline int pci_ats_enabled(struct pci_dev *dev)
327 #endif /* CONFIG_PCI_IOV */
329 static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
330 struct resource *res)
332 #ifdef CONFIG_PCI_IOV
333 int resno = res - dev->resource;
335 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
336 return pci_sriov_resource_alignment(dev, resno);
338 return resource_alignment(res);
341 extern void pci_enable_acs(struct pci_dev *dev);
343 struct pci_dev_reset_methods {
346 int (*reset)(struct pci_dev *dev, int probe);
349 #ifdef CONFIG_PCI_QUIRKS
350 extern int pci_dev_specific_reset(struct pci_dev *dev, int probe);
352 static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
358 #endif /* DRIVERS_PCI_H */