]> rtime.felk.cvut.cz Git - lincan.git/blobdiff - lincan/src/i82527.c
The first round of I/O space pointers separation.
[lincan.git] / lincan / src / i82527.c
index 5ef9d8f108b3fa838aea2b37271b91ffcc009cd1..9210ac4dba57c2e7e88d29db272a60bb12be49f1 100644 (file)
@@ -596,13 +596,16 @@ void i82527_irq_update_filter(struct canchip_t *chip, struct msgobj_t *obj)
 
                i82527_pre_read_config(chip, obj);
 
-               CANMSG("i82527_irq_update_filter: obj at 0x%08lx\n",obj->obj_base_addr);
+               CANMSG("i82527_irq_update_filter: obj at 0x%08lx\n",
+                       can_ioptr2ulong(obj->obj_base_addr));
        }
 }
 
 
-void i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
+int i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
 {
+       int job_done=0;
+
        while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
 
                if(can_msgobj_test_and_clear_fl(obj,TX_REQUEST)) {
@@ -616,6 +619,8 @@ void i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
                        }
                }
 
+               job_done=1;
+
                mb();
 
                can_msgobj_clear_fl(obj,TX_LOCK);
@@ -625,6 +630,8 @@ void i82527_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
                        continue;
                break;
        }
+
+       return job_done;
 }
 
 int i82527_irq_handler(int irq, struct canchip_t *chip)
@@ -632,6 +639,7 @@ int i82527_irq_handler(int irq, struct canchip_t *chip)
        unsigned char msgcfg;
 
        unsigned irq_register;
+       unsigned status_register;
        unsigned object;
        struct msgobj_t *obj;
        int loop_cnt=CHIP_MAX_IRQLOOP;
@@ -658,7 +666,8 @@ int i82527_irq_handler(int irq, struct canchip_t *chip)
                DEBUGMSG("i82527: iIRQ 0x%02x\n",irq_register);
                
                if (irq_register == 0x01) {
-                       DEBUGMSG("Status register: 0x%x\n",can_read_reg(chip, iSTAT));
+                       status_register=can_read_reg(chip, iSTAT);
+                       CANMSG("Status register: 0x%x\n",status_register);
                        continue;
                        /*return CANCHIP_IRQ_NONE;*/
                }
@@ -677,7 +686,17 @@ int i82527_irq_handler(int irq, struct canchip_t *chip)
                        can_msgobj_set_fl(obj,TX_REQUEST);
                        
                        /* calls i82527_irq_write_handler synchronized with other invocations */
-                       i82527_irq_sync_activities(chip, obj);
+                       if(i82527_irq_sync_activities(chip, obj)<=0){
+                               /* The interrupt has to be cleared anyway */
+                               canobj_write_reg(chip,obj,(MVAL_UNC|TXIE_UNC|RXIE_UNC|INTPD_RES),iMSGCTL0);
+
+                               /* 
+                                * Rerun for case, that parallel activity on SMP or fully-preemptive
+                                * kernel result in preparation and finished sending of message
+                                * between above if and canobj_write_reg.
+                                */
+                               i82527_irq_sync_activities(chip, obj);
+                       }
                }
                else {