-/* main.h
- * Header file for the Linux CAN-bus driver.
- * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
- * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
- * email:pisa@cmp.felk.cvut.cz
- * This software is released under the GPL-License.
- * Version lincan-0.3 17 Jun 2004
- */
-
-#ifndef MAIN_H
-#define MAIN_H
-
-#include <malloc.h>
+/**************************************************************************/
+/* File: main.h - the CAN driver basic data structures and functions */
+/* */
+/* LinCAN - (Not only) Linux CAN bus driver */
+/* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
+/* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
+/* Funded by OCERA and FRESCOR IST projects */
+/* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
+/* */
+/* LinCAN is free software; you can redistribute it and/or modify it */
+/* under terms of the GNU General Public License as published by the */
+/* Free Software Foundation; either version 2, or (at your option) any */
+/* later version. LinCAN is distributed in the hope that it will be */
+/* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
+/* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
+/* General Public License for more details. You should have received a */
+/* copy of the GNU General Public License along with LinCAN; see file */
+/* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
+/* Cambridge, MA 02139, USA. */
+/* */
+/* To allow use of LinCAN in the compact embedded systems firmware */
+/* and RT-executives (RTEMS for example), main authors agree with next */
+/* special exception: */
+/* */
+/* Including LinCAN header files in a file, instantiating LinCAN generics */
+/* or templates, or linking other files with LinCAN objects to produce */
+/* an application image/executable, does not by itself cause the */
+/* resulting application image/executable to be covered by */
+/* the GNU General Public License. */
+/* This exception does not however invalidate any other reasons */
+/* why the executable file might be covered by the GNU Public License. */
+/* Publication of enhanced or derived LinCAN files is required although. */
+/**************************************************************************/
+
+#ifndef _CAN_MAIN_H
+#define _CAN_MAIN_H
#include "./can.h"
#include "./constants.h"
#include "./ul_listbase.h"
-#include "./can_sysless.h"
+#include "./can_sysdep.h"
#include "./can_queue.h"
+#include "./can_bittiming.h"
#include "./errno.h"
#ifdef CAN_DEBUG
int candev_idx; /* board index in canhardware_t.candevice[] */
unsigned long io_addr; /* IO/physical MEM address */
unsigned long res_addr; /* optional reset register port */
- unsigned long dev_base_addr; /* CPU translated IO/virtual MEM address */
+ can_ioptr_t dev_base_addr; /* CPU translated IO/virtual MEM address */
+ can_ioptr_t aux_base_addr; /* CPU translated IO/virtual MEM address */
unsigned int flags;
int nr_all_chips;
int nr_82527_chips;
char *chip_type;
int chip_idx; /* chip index in candevice_t.chip[] */
int chip_irq;
- unsigned long chip_base_addr;
+ can_ioptr_t chip_base_addr;
unsigned int flags;
long clock; /* Chip clock in Hz */
long baudrate;
- void (*write_register)(unsigned data,unsigned long address);
- unsigned (*read_register)(unsigned long address);
+ void (*write_register)(unsigned data, can_ioptr_t address);
+ unsigned (*read_register)(can_ioptr_t address);
void *chip_data;
* that reuse same object for TX
*/
struct msgobj_t {
- unsigned long obj_base_addr;
+ can_ioptr_t obj_base_addr;
unsigned int minor; /* associated device minor number */
unsigned int object; /* object number in canchip_t +1 for debug printk */
unsigned long obj_flags;
int (*release_io)(struct candevice_t *candev);
int (*reset)(struct candevice_t *candev);
int (*init_hw_data)(struct candevice_t *candev);
+ void (*done_hw_data)(struct candevice_t *candev);
int (*init_chip_data)(struct candevice_t *candev, int chipnr);
int (*init_obj_data)(struct canchip_t *chip, int objnr);
int (*program_irq)(struct candevice_t *candev);
- void (*write_register)(unsigned data,unsigned long address);
- unsigned (*read_register)(unsigned long address);
+ void (*write_register)(unsigned data, can_ioptr_t address);
+ unsigned (*read_register)(can_ioptr_t address);
};
/**
* @stop_chip: stops chip message processing
* @irq_handler: interrupt service routine
* @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
+ *
+ * @set_bittiming: set bittiming parameters
+ * @get_bittiming_const: get chip specific constants for bittiming computation
*/
struct chipspecops_t {
int (*chip_config)(struct canchip_t *chip);
int (*stop_chip)(struct canchip_t *chip);
int (*irq_handler)(int irq, struct canchip_t *chip);
int (*irq_accept)(int irq, struct canchip_t *chip);
+
+ int (*set_bittiming)(struct canchip_t *chip, int brp, int sjw, int tseg1, int tseg2);
+ int (*get_bittiming_const)(struct canchip_t *chip, struct can_bittiming_const *btc);
};
struct mem_addr {
extern int minor[MAX_TOT_CHIPS];
extern int extended;
extern int baudrate[MAX_TOT_CHIPS];
-extern char *hw[MAX_HW_CARDS];
extern int irq[MAX_IRQ];
+extern char *hw[MAX_HW_CARDS];
extern unsigned long io[MAX_HW_CARDS];
+extern long clockfreq[MAX_HW_CARDS];
extern int processlocal;
extern struct canhardware_t *hardware_p;
-//extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
-struct canchip_t *chips_p[MAX_TOT_CHIPS];
+extern struct canchip_t *chips_p[MAX_TOT_CHIPS];
extern struct msgobj_t *objects_p[MAX_TOT_MSGOBJS];
extern struct mem_addr *mem_head;
#if defined(CONFIG_OC_LINCAN_PORTIO_ONLY)
-extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
+extern inline void can_write_reg(const struct canchip_t *chip, unsigned data, unsigned reg_offs)
{
- outb(data, chip->chip_base_addr+address);
+ can_outb(data, chip->chip_base_addr+reg_offs);
}
-extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
+extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
{
- return inb(chip->chip_base_addr+address);
+ return can_inb(chip->chip_base_addr+reg_offs);
}
extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
- unsigned char data, unsigned address)
+ unsigned data, unsigned reg_offs)
{
- outb(data, obj->obj_base_addr+address);
+ can_outb(data, obj->obj_base_addr+reg_offs);
}
extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
- unsigned address)
+ unsigned reg_offs)
{
- return inb(obj->obj_base_addr+address);
+ return can_inb(obj->obj_base_addr+reg_offs);
}
#elif defined(CONFIG_OC_LINCAN_MEMIO_ONLY)
-extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
+extern inline void can_write_reg(const struct canchip_t *chip, unsigned data, unsigned reg_offs)
{
- writeb(data, chip->chip_base_addr+address);
+ can_writeb(data, chip->chip_base_addr+reg_offs);
}
-extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
+extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
{
- return readb(chip->chip_base_addr+address);
+ return can_readb(chip->chip_base_addr+reg_offs);
}
extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
- unsigned char data, unsigned address)
+ unsigned data, unsigned reg_offs)
{
- writeb(data, obj->obj_base_addr+address);
+ can_writeb(data, obj->obj_base_addr+reg_offs);
}
extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
- unsigned address)
+ unsigned reg_offs)
{
- return readb(obj->obj_base_addr+address);
+ return can_readb(obj->obj_base_addr+reg_offs);
}
#else /*CONFIG_OC_LINCAN_DYNAMICIO*/
#define CONFIG_OC_LINCAN_DYNAMICIO
#endif
-/* Inline function to write to the hardware registers. The argument address is
- * relative to the memory map of the chip and not the absolute memory address.
+/* Inline function to write to the hardware registers. The argument reg_offs is
+ * relative to the memory map of the chip and not the absolute memory reg_offs.
*/
-extern inline void can_write_reg(const struct canchip_t *chip, unsigned char data, unsigned address)
+extern inline void can_write_reg(const struct canchip_t *chip, unsigned data, unsigned reg_offs)
{
- unsigned long address_to_write;
- address_to_write = chip->chip_base_addr+address;
+ can_ioptr_t address_to_write;
+ address_to_write = chip->chip_base_addr+reg_offs;
chip->write_register(data, address_to_write);
}
-extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned address)
+extern inline unsigned can_read_reg(const struct canchip_t *chip, unsigned reg_offs)
{
- unsigned long address_to_read;
- address_to_read = chip->chip_base_addr+address;
+ can_ioptr_t address_to_read;
+ address_to_read = chip->chip_base_addr+reg_offs;
return chip->read_register(address_to_read);
}
extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
- unsigned char data, unsigned address)
+ unsigned data, unsigned reg_offs)
{
- unsigned long address_to_write;
- address_to_write = obj->obj_base_addr+address;
+ can_ioptr_t address_to_write;
+ address_to_write = obj->obj_base_addr+reg_offs;
chip->write_register(data, address_to_write);
}
extern inline unsigned canobj_read_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
- unsigned address)
+ unsigned reg_offs)
{
- unsigned long address_to_read;
- address_to_read = obj->obj_base_addr+address;
+ can_ioptr_t address_to_read;
+ address_to_read = obj->obj_base_addr+reg_offs;
return chip->read_register(address_to_read);
}
#endif /*CONFIG_OC_LINCAN_DYNAMICIO*/
-int can_base_addr_fixup(struct candevice_t *candev, unsigned long new_base);
+int can_base_addr_fixup(struct candevice_t *candev, can_ioptr_t new_base);
int can_request_io_region(unsigned long start, unsigned long n, const char *name);
void can_release_io_region(unsigned long start, unsigned long n);
int can_request_mem_region(unsigned long start, unsigned long n, const char *name);
void can_release_mem_region(unsigned long start, unsigned long n);
+#ifdef CAN_ENABLE_PCI_SUPPORT
+struct pci_dev *can_pci_get_next_untaken_device(unsigned int vendor, unsigned int device);
+struct pci_dev *can_pci_get_next_untaken_subsyst(unsigned int vendor, unsigned int device,
+ unsigned int ss_vendor, unsigned int ss_device);
+#endif /*CAN_ENABLE_PCI_SUPPORT*/
+
struct boardtype_t {
const char *boardtype;
int (*board_register)(struct hwspecops_t *hwspecops);
extern int can_rtl_priority;
#endif /*CAN_WITH_RTL*/
-#endif /* MAIN_H */
+extern struct candevice_t* register_hotplug_dev(const char *hwname,int (*chipdataregfnc)(struct canchip_t *chip,void *data),void *devdata);
+extern void deregister_hotplug_dev(struct candevice_t *dev);
+extern void cleanup_hotplug_dev(struct candevice_t *dev);
+
+#endif /* _CAN_MAIN_H */