-/* main.h
- * Header file for the Linux CAN-bus driver.
- * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
- * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
- * email:pisa@cmp.felk.cvut.cz
- * This software is released under the GPL-License.
- * Version lincan-0.3 17 Jun 2004
- */
+/**************************************************************************/
+/* File: main.h - the CAN driver basic data structures and functions */
+/* */
+/* LinCAN - (Not only) Linux CAN bus driver */
+/* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
+/* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
+/* Funded by OCERA and FRESCOR IST projects */
+/* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
+/* */
+/* LinCAN is free software; you can redistribute it and/or modify it */
+/* under terms of the GNU General Public License as published by the */
+/* Free Software Foundation; either version 2, or (at your option) any */
+/* later version. LinCAN is distributed in the hope that it will be */
+/* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
+/* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
+/* General Public License for more details. You should have received a */
+/* copy of the GNU General Public License along with LinCAN; see file */
+/* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
+/* Cambridge, MA 02139, USA. */
+/* */
+/* To allow use of LinCAN in the compact embedded systems firmware */
+/* and RT-executives (RTEMS for example), main authors agree with next */
+/* special exception: */
+/* */
+/* Including LinCAN header files in a file, instantiating LinCAN generics */
+/* or templates, or linking other files with LinCAN objects to produce */
+/* an application image/executable, does not by itself cause the */
+/* resulting application image/executable to be covered by */
+/* the GNU General Public License. */
+/* This exception does not however invalidate any other reasons */
+/* why the executable file might be covered by the GNU Public License. */
+/* Publication of enhanced or derived LinCAN files is required although. */
+/**************************************************************************/
+
+// #define CAN_DEBUG
#include "./can.h"
#include "./constants.h"
int nr_all_chips;
int nr_82527_chips;
int nr_sja1000_chips;
+ int nr_mcp2515_chips;
can_spinlock_t device_lock;
struct canchip_t *chip[MAX_HW_CHIPS];
struct canhardware_t *hosthardware_p;
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
+ struct kref refcount;
+#endif
+
union {
void *anydev;
#ifdef CAN_ENABLE_PCI_SUPPORT
int chip_idx; /* chip index in candevice_t.chip[] */
int chip_irq;
can_ioptr_t chip_base_addr;
- unsigned int flags;
+ uint16_t flags;
long clock; /* Chip clock in Hz */
long baudrate;
void (*write_register)(unsigned data, can_ioptr_t address);
unsigned (*read_register)(can_ioptr_t address);
+ /* SPI / mcp2515 specific */
+ int (*spi_acquire_bus)(struct candevice_t *candev, short channel, int block);
+ void (*spi_release_bus)(struct candevice_t *candev, short channel);
+ int (*spi_transfer)(struct candevice_t *candev, void *tx, void *rx, uint16_t len);
+ int (*spi_async_transfer)(struct candevice_t *candev, void (*callback)(void *data, uint8_t count), void *data, uint8_t count, uint8_t fasthandler);
+ short spi_channel;
+
+
void *chip_data;
unsigned short sja_cdr_reg; /* sja1000 only! */
int (*program_irq)(struct candevice_t *candev);
void (*write_register)(unsigned data, can_ioptr_t address);
unsigned (*read_register)(can_ioptr_t address);
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10))
+ void (*release_device)(struct kref *refcount);
+#endif
+
+ int (*spi_acquire_bus)(struct candevice_t *candev, short channel, int block);
+ void (*spi_release_bus)(struct candevice_t *candev, short channel);
+ int (*spi_transfer)(struct candevice_t *candev, void *tx, void *rx, uint16_t len);
+ int (*spi_async_transfer)(struct candevice_t *candev, void (*callback)(void *data, uint8_t count), void *data, uint8_t count, uint8_t fasthandler);
};
/**
* @stop_chip: stops chip message processing
* @irq_handler: interrupt service routine
* @irq_accept: optional fast irq accept routine responsible for blocking further interrupts
+ * @get_info: retrieve chp-specifc info for display in proc fs
*/
struct chipspecops_t {
int (*chip_config)(struct canchip_t *chip);
int (*stop_chip)(struct canchip_t *chip);
int (*irq_handler)(int irq, struct canchip_t *chip);
int (*irq_accept)(int irq, struct canchip_t *chip);
+ int (*reset_chip)(struct canchip_t *chip);
+ int (*get_info)(struct canchip_t *chip, char *buf);
};
struct mem_addr {
#define CONFIG_OC_LINCAN_DYNAMICIO
#endif
+#define SPI_MESSAGE_LENGTH (32)
+
+/**
+ * struct can_spi_async_t - SPI asynchronous communication supplemental data
+ * @chip: pointer to the chip structure
+ * @opcode: Operation code to be identified by spi_async callback function
+ * @tx_buf: a read-only copy of the transfer buffer
+ * @rx_buf: a read-only copy of the transfer buffer
+ * @len: length of the transmitted buffer
+ * @obj: lincan message for data transmission
+ */
+struct can_spi_async_t{
+ struct canchip_t *chip;
+ uint8_t opcode;
+ uint8_t tx_buf[SPI_MESSAGE_LENGTH];
+ uint8_t rx_buf[SPI_MESSAGE_LENGTH];
+ size_t len;
+ struct msgobj_t *obj;
+ canmsg_tstamp_t timestamp;
+};
+
+
/* Inline function to write to the hardware registers. The argument reg_offs is
* relative to the memory map of the chip and not the absolute memory reg_offs.
*/
return chip->read_register(address_to_read);
}
+extern inline int can_spi_transfer(struct canchip_t *chip, void *tx, void *rx, uint16_t len)
+{
+ return chip->spi_transfer(chip->hostdevice, tx, rx, len);
+}
+
+extern inline int can_spi_async_transfer(struct canchip_t *chip, void (*callback)(void *data, uint8_t count), struct can_spi_async_t *data, uint8_t count, uint8_t fasthandler)
+{
+ return chip->spi_async_transfer(chip->hostdevice, callback, data, count, fasthandler);
+}
+
+extern inline int can_spi_acquire_bus(struct canchip_t *chip, int block)
+{
+ return chip->spi_acquire_bus(chip->hostdevice, chip->spi_channel, block);
+}
+
+extern inline void can_spi_release_bus(struct canchip_t *chip)
+{
+ chip->spi_release_bus(chip->hostdevice, chip->spi_channel);
+}
+
+
extern inline void canobj_write_reg(const struct canchip_t *chip, const struct msgobj_t *obj,
unsigned char data, unsigned reg_offs)
{
extern int can_rtl_priority;
#endif /*CAN_WITH_RTL*/
-extern struct candevice_t* register_usbdev(const char *hwname,void *devdata,void (*chipdataregfnc)(struct canchip_t *chip,void *data));
-extern void cleanup_usbdev(struct candevice_t *dev);
+extern struct candevice_t* register_hotplug_dev(const char *hwname,int (*chipdataregfnc)(struct canchip_t *chip,void *data),void *devdata);
+extern void deregister_hotplug_dev(struct candevice_t *dev);
+extern void cleanup_hotplug_dev(struct candevice_t *dev);