/*
-You need to know the following:
-" RX1 is connected to ground.
-" TX1 is not connected.
-" CLKO is not connected.
-" Setting the OCR register to 0xFA is a good idea.
- This means normal output mode , push-pull and the correct polarity.
-" In the CDR register, you should set CBP to 1.
+You need to know the following:
+" RX1 is connected to ground.
+" TX1 is not connected.
+" CLKO is not connected.
+" Setting the OCR register to 0xFA is a good idea.
+ This means normal output mode , push-pull and the correct polarity.
+" In the CDR register, you should set CBP to 1.
You will probably also want to set the clock divider value to 0 (meaning divide-by-2),
the Pelican bit, and the clock-off bit (you have no need for CLKOUT anyway.)
error_io:
pci_release_region(candev->sysdevptr.pcidev, 1);
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
-
+
return -ENODEV;
}
void adlink7841_write_register(unsigned data, can_ioptr_t address)
{
- can_outb(data,address);
+ can_outb(data,address);
}
unsigned adlink7841_read_register(can_ioptr_t address)
adlink7841_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
adlink7841_write_register(0, chip->chip_base_addr+SJAIER);
-
+
adlink7841_read_register(chip->chip_base_addr+SJAIR);
}
-
+
adlink7841_connect_irq(candev);
return 0;
-}
+}
int adlink7841_init_hw_data(struct candevice_t *candev)
{
- struct pci_dev *pcidev = NULL;
+ struct pci_dev *pcidev;
int i;
- do {
- pcidev = pci_find_device(ADLINK7841_PCI_VENDOR_ID, ADLINK7841_PCI_PRODUCT_ID, pcidev);
- if(pcidev == NULL) return -ENODEV;
- } while(can_check_dev_taken(pcidev));
-
+ pcidev = can_pci_get_next_untaken_device(ADLINK7841_PCI_VENDOR_ID, ADLINK7841_PCI_PRODUCT_ID);
+ if(pcidev == NULL)
+ return -ENODEV;
+
if (pci_enable_device (pcidev)){
printk(KERN_CRIT "Setup of ADLINK7841 failed\n");
+ can_pci_dev_put(pcidev);
return -EIO;
}
candev->sysdevptr.pcidev=pcidev;
-
+
for(i=1;i<3;i++){
if(!(pci_resource_flags(pcidev,i)&IORESOURCE_IO)){
printk(KERN_CRIT "ADLINK7841 region %d is not IO\n",i);
+ can_pci_dev_put(pcidev);
return -EIO;
}
}
candev->dev_base_addr=pci_resource_start(pcidev,1); /* PLX 9050 BASE*/
candev->io_addr=pci_resource_start(pcidev,2); /*IO window for SJA1000 chips*/
candev->res_addr=pci_resource_start(pcidev,1); /*reserved*/
-
+
/*candev->flags |= CANDEV_PROGRAMMABLE_IRQ;*/
candev->nr_82527_chips=0;
return 0;
}
+void adlink7841_done_hw_data(struct candevice_t *candev)
+{
+ struct pci_dev *pcidev = candev->sysdevptr.pcidev;
+ can_pci_dev_put(pcidev);
+}
+
int adlink7841_init_chip_data(struct candevice_t *candev, int chipnr)
{
if(candev->sysdevptr.pcidev==NULL)
return -ENODEV;
-
+
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
sja1000p_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
return 0;
-}
+}
int adlink7841_init_obj_data(struct canchip_t *chip, int objnr)
{
hwspecops->release_io = adlink7841_release_io;
hwspecops->reset = adlink7841_reset;
hwspecops->init_hw_data = adlink7841_init_hw_data;
+ hwspecops->done_hw_data = adlink7841_done_hw_data;
hwspecops->init_chip_data = adlink7841_init_chip_data;
hwspecops->init_obj_data = adlink7841_init_obj_data;
hwspecops->write_register = adlink7841_write_register;