* Rewritten for new CAN queues by Pavel Pisa - OCERA team member
* email:pisa@cmp.felk.cvut.cz
* This software is released under the GPL-License.
* Rewritten for new CAN queues by Pavel Pisa - OCERA team member
* email:pisa@cmp.felk.cvut.cz
* This software is released under the GPL-License.
kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
i=20;
kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
i=20;
kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
if(!i--) return -ENODEV;
udelay(1000);
kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
}
cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR);
if(!i--) return -ENODEV;
udelay(1000);
kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
}
cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR);
- pcidev = pci_find_device(KV_PCICAN_PCICAN_VENDOR, KV_PCICAN_PCICAN_ID, pcidev);
- if(pcidev == NULL) return -ENODEV;
+ do {
+ pcidev = pci_find_device(KV_PCICAN_PCICAN_VENDOR, KV_PCICAN_PCICAN_ID, pcidev);
+ if(pcidev == NULL) return -ENODEV;
+ } while(can_check_dev_taken(pcidev));
candev->chip[chipnr]->chip_base_addr=
candev->io_addr+chipnr*KV_PCICAN_BYTES_PER_CIRCUIT;
candev->chip[chipnr]->flags = 0;
candev->chip[chipnr]->int_cpu_reg = 0;
candev->chip[chipnr]->int_clk_reg = 0;
candev->chip[chipnr]->int_bus_reg = 0;
candev->chip[chipnr]->chip_base_addr=
candev->io_addr+chipnr*KV_PCICAN_BYTES_PER_CIRCUIT;
candev->chip[chipnr]->flags = 0;
candev->chip[chipnr]->int_cpu_reg = 0;
candev->chip[chipnr]->int_clk_reg = 0;
candev->chip[chipnr]->int_bus_reg = 0;
candev->chip[chipnr]->sja_ocr_reg = KV_PCICAN_OCR_DEFAULT_STD;
candev->chip[chipnr]->clock = 16000000;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
candev->chip[chipnr]->sja_ocr_reg = KV_PCICAN_OCR_DEFAULT_STD;
candev->chip[chipnr]->clock = 16000000;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;