* Rewritten for new CAN queues by Pavel Pisa - OCERA team member
* email:pisa@cmp.felk.cvut.cz
* This software is released under the GPL-License.
- * Version lincan-0.2 9 Jul 2003
+ * Version lincan-0.3 17 Jun 2004
*/
#include "../include/can.h"
}
-void kv_pcican_write_register(unsigned char data, unsigned long address)
+void kv_pcican_write_register(unsigned data, unsigned long address)
{
outb(data,address);
}
if(!candev->chip[chip_nr]) continue;
chip=candev->chip[chip_nr];
- kv_pcican_write_register(MOD_RM, chip->chip_base_addr+SJAMOD);
+ kv_pcican_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
udelay(1000);
cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR);
- kv_pcican_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+ kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
i=20;
kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
- while (kv_pcican_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){
+ while (kv_pcican_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
if(!i--) return -ENODEV;
udelay(1000);
kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
}
cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR);
- kv_pcican_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+ kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
struct pci_dev *pcidev = NULL;
int i;
- pcidev = pci_find_device(KV_PCICAN_PCICAN_VENDOR, KV_PCICAN_PCICAN_ID, pcidev);
- if(pcidev == NULL) return -ENODEV;
+ do {
+ pcidev = pci_find_device(KV_PCICAN_PCICAN_VENDOR, KV_PCICAN_PCICAN_ID, pcidev);
+ if(pcidev == NULL) return -ENODEV;
+ } while(can_check_dev_taken(pcidev));
if (pci_enable_device (pcidev)){
printk(KERN_CRIT "Setup of PCICAN failed\n");
candev->sysdevptr.pcidev=pcidev;
for(i=0;i<3;i++){
- if(!(pci_resource_flags(pcidev,0)&IORESOURCE_IO)){
+ if(!(pci_resource_flags(pcidev,i)&IORESOURCE_IO)){
printk(KERN_CRIT "PCICAN region %d is not IO\n",i);
return -EIO;
}
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
- candev->chip[chipnr]->chip_type="sja1000p";
+ sja1000p_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->chip_base_addr=
candev->io_addr+chipnr*KV_PCICAN_BYTES_PER_CIRCUIT;
candev->chip[chipnr]->flags = 0;
candev->chip[chipnr]->int_cpu_reg = 0;
candev->chip[chipnr]->int_clk_reg = 0;
candev->chip[chipnr]->int_bus_reg = 0;
- candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
+ candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
candev->chip[chipnr]->sja_ocr_reg = KV_PCICAN_OCR_DEFAULT_STD;
candev->chip[chipnr]->clock = 16000000;
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;