LinCAN version updated to 0.3

[lincan.git] / lincan / src / kv_pcican.c

diff --git a/lincan/src/kv_pcican.c b/lincan/src/kv_pcican.c
index e7f36e3306cef9b1e6ccabb0cb0f46614d542622..c8836107f763f7ab24ed7939004e6d8654c7ad40 100644 (file)
--- a/lincan/src/kv_pcican.c
+++ b/lincan/src/kv_pcican.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 #include "../include/can.h"
@@ -121,7 +121,7 @@ int kv_pcican_release_io(struct candevice_t *candev)
 }
 
 
-void kv_pcican_write_register(unsigned char data, unsigned long address)
+void kv_pcican_write_register(unsigned data, unsigned long address)
 {
        outb(data,address); 
 }
@@ -148,24 +148,24 @@ int kv_pcican_reset(struct candevice_t *candev)
                if(!candev->chip[chip_nr]) continue;
                chip=candev->chip[chip_nr];
 
-               kv_pcican_write_register(MOD_RM, chip->chip_base_addr+SJAMOD);
+               kv_pcican_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
                udelay(1000);
 
                cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR);
-               kv_pcican_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+               kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
 
                kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
 
                i=20;
                kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
-               while (kv_pcican_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){
+               while (kv_pcican_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
                        if(!i--) return -ENODEV;
                        udelay(1000);
                        kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
                }
 
                cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR);
-               kv_pcican_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+               kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
 
                kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
                
@@ -240,7 +240,7 @@ int kv_pcican_init_chip_data(struct candevice_t *candev, int chipnr)
        candev->chip[chipnr]->int_cpu_reg = 0;
        candev->chip[chipnr]->int_clk_reg = 0;
        candev->chip[chipnr]->int_bus_reg = 0;
-       candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
+       candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
        candev->chip[chipnr]->sja_ocr_reg = KV_PCICAN_OCR_DEFAULT_STD;
        candev->chip[chipnr]->clock = 16000000;
        candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;