The first round of I/O space pointers separation.

[lincan.git] / lincan / src / kv_pcican.c

diff --git a/lincan/src/kv_pcican.c b/lincan/src/kv_pcican.c
index e7f36e3306cef9b1e6ccabb0cb0f46614d542622..e01a9eb4ca0ad5b3a0964ea68f14387aa01b3c7b 100644 (file)
--- a/lincan/src/kv_pcican.c
+++ b/lincan/src/kv_pcican.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 #include "../include/can.h"
@@ -56,18 +56,18 @@ void kv_pcican_disconnect_irq(struct candevice_t *candev)
 {
        unsigned long tmp;
        /* Disable interrupts from card */
-       tmp = inl(candev->dev_base_addr + S5920_INTCSR);
+       tmp = can_inl(candev->dev_base_addr + S5920_INTCSR);
        tmp &= ~INTCSR_ADDON_INTENABLE_M;
-       outl(tmp, candev->dev_base_addr + S5920_INTCSR);
+       can_outl(tmp, candev->dev_base_addr + S5920_INTCSR);
 }
 
 void kv_pcican_connect_irq(struct candevice_t *candev)
 {
        unsigned long tmp;
        /* Enable interrupts from card */
-       tmp = inl(candev->dev_base_addr + S5920_INTCSR);
+       tmp = can_inl(candev->dev_base_addr + S5920_INTCSR);
        tmp |= INTCSR_ADDON_INTENABLE_M;
-       outl(tmp, candev->dev_base_addr + S5920_INTCSR);
+       can_outl(tmp, candev->dev_base_addr + S5920_INTCSR);
 }
 
 
@@ -121,26 +121,26 @@ int kv_pcican_release_io(struct candevice_t *candev)
 }
 
 
-void kv_pcican_write_register(unsigned char data, unsigned long address)
+void kv_pcican_write_register(unsigned data, can_ioptr_t address)
 {
-       outb(data,address); 
+       can_outb(data,address); 
 }
 
-unsigned kv_pcican_read_register(unsigned long address)
+unsigned kv_pcican_read_register(can_ioptr_t address)
 {
-       return inb(address);
+       return can_inb(address);
 }
 
 int kv_pcican_reset(struct candevice_t *candev)
 {
        int i=0,chip_nr;
-       struct chip_t *chip;
+       struct canchip_t *chip;
        unsigned cdr;
 
        DEBUGMSG("Resetting kv_pcican hardware ...\n");
 
        /* Assert PTADR# - we're in passive mode so the other bits are not important */
-       outl(0x80808080L, candev->dev_base_addr + S5920_PTCR);
+       can_outl(0x80808080L, candev->dev_base_addr + S5920_PTCR);
 
        kv_pcican_disconnect_irq(candev);
 
@@ -148,24 +148,24 @@ int kv_pcican_reset(struct candevice_t *candev)
                if(!candev->chip[chip_nr]) continue;
                chip=candev->chip[chip_nr];
 
-               kv_pcican_write_register(MOD_RM, chip->chip_base_addr+SJAMOD);
+               kv_pcican_write_register(sjaMOD_RM, chip->chip_base_addr+SJAMOD);
                udelay(1000);
 
                cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR);
-               kv_pcican_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+               kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
 
                kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
 
                i=20;
                kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
-               while (kv_pcican_read_register(chip->chip_base_addr+SJAMOD)&MOD_RM){
+               while (kv_pcican_read_register(chip->chip_base_addr+SJAMOD)&sjaMOD_RM){
                        if(!i--) return -ENODEV;
                        udelay(1000);
                        kv_pcican_write_register(0, chip->chip_base_addr+SJAMOD);
                }
 
                cdr=kv_pcican_read_register(chip->chip_base_addr+SJACDR);
-               kv_pcican_write_register(cdr|CDR_PELICAN, chip->chip_base_addr+SJACDR);
+               kv_pcican_write_register(cdr|sjaCDR_PELICAN, chip->chip_base_addr+SJACDR);
 
                kv_pcican_write_register(0, chip->chip_base_addr+SJAIER);
                
@@ -233,14 +233,14 @@ int kv_pcican_init_chip_data(struct candevice_t *candev, int chipnr)
        
        candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
 
-       candev->chip[chipnr]->chip_type="sja1000p";
+       sja1000p_fill_chipspecops(candev->chip[chipnr]);
        candev->chip[chipnr]->chip_base_addr=
                        candev->io_addr+chipnr*KV_PCICAN_BYTES_PER_CIRCUIT;
        candev->chip[chipnr]->flags = 0;
        candev->chip[chipnr]->int_cpu_reg = 0;
        candev->chip[chipnr]->int_clk_reg = 0;
        candev->chip[chipnr]->int_bus_reg = 0;
-       candev->chip[chipnr]->sja_cdr_reg = CDR_CBP | CDR_CLK_OFF;
+       candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CBP | sjaCDR_CLK_OFF;
        candev->chip[chipnr]->sja_ocr_reg = KV_PCICAN_OCR_DEFAULT_STD;
        candev->chip[chipnr]->clock = 16000000;
        candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
@@ -248,7 +248,7 @@ int kv_pcican_init_chip_data(struct candevice_t *candev, int chipnr)
        return 0;
 }      
 
-int kv_pcican_init_obj_data(struct chip_t *chip, int objnr)
+int kv_pcican_init_obj_data(struct canchip_t *chip, int objnr)
 {
        chip->msgobj[objnr]->obj_base_addr=chip->chip_base_addr;
        return 0;