* Written for new CAN driver version by Pavel Pisa - OCERA team member
* email:pisa@cmp.felk.cvut.cz
* This software is released under the GPL-License.
- * Version lincan-0.2 9 Jul 2003
+ * Version lincan-0.3 17 Jun 2004
*/
#include "../include/can.h"
do {
ptr16 = (__u16*)chipext->rxBufPtr;
- u = readw(ptr16++);
+ u = unican_readw(ptr16++);
if ( !(u & CL2_MESSAGE_VALID) ) break; /* No more messages in the queue */
obj->rx_msg.id = ((__u32)(u & 0xFF00 )) << 16;
- u = readw(ptr16++);
+ u = unican_readw(ptr16++);
obj->rx_msg.id |= ((__u32)( u & 0x00FF )) << 16;
obj->rx_msg.id |= (__u32)( u & 0xFF00 );
- u = readw(ptr16++);
+ u = unican_readw(ptr16++);
obj->rx_msg.id |= (__u32)( u & 0x00FF );
if(obj->rx_msg.length > CAN_MSG_LENGTH) obj->rx_msg.length = CAN_MSG_LENGTH;
for ( i = 0; i < obj->rx_msg.length; ) {
- u = readw(ptr16++);
+ u = unican_readw(ptr16++);
obj->rx_msg.data[i++] = (__u8)( u );
obj->rx_msg.data[i++] = (__u8)( u >> 8 );
}
if ( obj->rx_msg.length & 0x01 ) { /* odd */
- timestamp = ( (readw(ptr16++) & 0x00FF) | (u & 0xFF00) );
+ timestamp = ( (unican_readw(ptr16++) & 0x00FF) | (u & 0xFF00) );
} else { /* even */
- u = readw(ptr16++);
+ u = unican_readw(ptr16++);
timestamp = (u << 8) | (u >> 8);
}
- writew(0x000,(__u16*)chipext->rxBufPtr);
+ unican_writew(0x000,(__u16*)chipext->rxBufPtr);
#ifdef CAN_MSG_VERSION_2
obj->rx_msg.timestamp.tv_sec = 0;
do {
ptr16 = (__u16*)chipext->asyncTxBufPtr;
- if(readw(ptr16) & CL2_MESSAGE_VALID)
+ if(unican_readw(ptr16) & CL2_MESSAGE_VALID)
return; /* No free space in asynchronous Tx queue */
cmd=canque_test_outslot(obj->qends, &obj->tx_qedge, &obj->tx_slot);
}
ptr16++;
u = ((cobid>>16) & 0x00FF ) + (cobid & 0xFF00);
- writew(u,ptr16++);
+ unican_writew(u,ptr16++);
len = obj->tx_slot->msg.length;
if(len > CAN_MSG_LENGTH)
if ( obj->tx_slot->msg.flags & MSG_EXT )
u |= CL2_EXT_FRAME<<8;
- writew(u,ptr16++);
+ unican_writew(u,ptr16++);
for ( i = 0; i < len-1; ) {
u = obj->tx_slot->msg.data[i++];
u |= ((__u16)obj->tx_slot->msg.data[i]<<8); i++;
- writew(u,ptr16++);
+ unican_writew(u,ptr16++);
}
if(i == len) {
- writew(timestamp,ptr16);
+ unican_writew(timestamp,ptr16);
} else {
u = obj->tx_slot->msg.data[i++];
u |= ((timestamp & 0x00FF)<<8);
- writew(u,ptr16++);
- writew(timestamp & 0x00FF, ptr16);
+ unican_writew(u,ptr16++);
+ unican_writew(timestamp & 0x00FF, ptr16);
}
u = ((cobid>>16) & 0xFF00) | CL2_MESSAGE_VALID;
- writew(u,(__u16*)chipext->asyncTxBufPtr);
+ unican_writew(u,(__u16*)chipext->asyncTxBufPtr);
if ( (chipext->asyncTxBufBase + chipext->asyncTxBufSize*16) <=
(chipext->asyncTxBufPtr += 16) ) {
return 0;
}
-#define CHIP_TYPE "unican"
-
/**
* unican_init_chip_data - Initialize chips
* @candev: Pointer to candevice/board structure
int unican_init_chip_data(struct candevice_t *candev, int chipnr)
{
struct chip_t *chip = candev->chip[chipnr];
- chip->chip_type = CHIP_TYPE;
+ chip->chip_type = "unican";
chip->chip_base_addr = 0;
chip->clock = 10000000;
chip->int_clk_reg = 0x0;
int unican_pci_request_io(struct candevice_t *candev)
{
+ unsigned long remap_addr;
+
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
if(pci_request_region(candev->sysdevptr.pcidev, 0, "unican_pci") != 0){
CANMSG("Request of Unican PCI range failed\n");
}
#endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
+ candev->dev_base_addr=pci_resource_start(candev->sysdevptr.pcidev,0);
+ candev->io_addr=candev->dev_base_addr;
+ candev->res_addr=candev->dev_base_addr;
+
+ if ( !( remap_addr = (long) ioremap( candev->io_addr, IO_RANGE ) ) ) {
+ CANMSG("Unable to access I/O memory at: 0x%lx\n", candev->io_addr);
+ #if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
+ pci_release_region(candev->sysdevptr.pcidev, 0);
+ #else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
+ pci_release_regions(candev->sysdevptr.pcidev);
+ #endif /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
+ return -ENODEV;
+
+ }
+ can_base_addr_fixup(candev, remap_addr);
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr, candev->io_addr + IO_RANGE - 1);
+ DEBUGMSG("VMA: dev_base_addr: 0x%lx chip_base_addr: 0x%lx\n",
+ candev->dev_base_addr, candev->chip[0]->chip_base_addr);
+
return 0;
}
int unican_pci_release_io(struct candevice_t *candev)
{
+ iounmap((void*)candev->dev_base_addr);
#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))
pci_release_region(candev->sysdevptr.pcidev, 0);
#else /*(LINUX_VERSION_CODE > KERNEL_VERSION(2,4,21))*/
printk(KERN_CRIT "Unican PCI region 0 is not MEM\n");
return -EIO;
}
- candev->dev_base_addr=pci_resource_start(pcidev,0); /*S5920*/
+ candev->dev_base_addr=pci_resource_start(pcidev,0);
candev->io_addr=candev->dev_base_addr;
candev->res_addr=candev->dev_base_addr;
{
int ret;
candev->chip[chipnr]->chip_irq=candev->sysdevptr.pcidev->irq;
- ret = unican_pci_init_chip_data(candev, chipnr);
+ ret = unican_init_chip_data(candev, chipnr);
candev->chip[chipnr]->flags |= CHIP_IRQ_PCI;
return ret;
}
#ifdef CAN_ENABLE_VME_SUPPORT
-int unican_vme_reset(struct candevice_t *candev)
-{
- struct chip_t *chip = candev->chip[0];
- writew(chip->chip_irq,chip->chip_base_addr+CL2_VME_INT_VECTOR);
- return unican_reset(candev);
-}
-
-
-int unican_vme_register(struct hwspecops_t *hwspecops)
-{
- hwspecops->request_io = unican_request_io;
- hwspecops->release_io = unican_release_io;
- hwspecops->reset = unican_vme_reset;
- hwspecops->init_hw_data = unican_init_hw_data;
- hwspecops->init_chip_data = unican_init_chip_data;
- hwspecops->init_obj_data = unican_init_obj_data;
- hwspecops->write_register = NULL;
- hwspecops->read_register = NULL;
- hwspecops->program_irq = unican_program_irq;
- return 0;
-}
+#include "unican_vme.c"
#endif /*CAN_ENABLE_VME_SUPPORT*/