LinCAN version updated to 0.3

[lincan.git] / lincan / src / hms30c7202_can.c

diff --git a/lincan/src/hms30c7202_can.c b/lincan/src/hms30c7202_can.c
index 2bf38aa30adb92a5070b7c98156c3e572ebbc2e3..ee99cb698419472055c3349a041cc3d182d4d33a 100644 (file)
--- a/lincan/src/hms30c7202_can.c
+++ b/lincan/src/hms30c7202_can.c
@@ -6,7 +6,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */
 
 #include <linux/delay.h>
@@ -40,7 +40,7 @@
  */
 int hms30c7202_request_io(struct candevice_t *candev)
 {
-       DEBUGMSG("(c%d)calling hms30c7202_request_io(...)\n", pchip->chip_nr);
+       DEBUGMSG("(c%d)calling hms30c7202_request_io(...)\n", candev->chip[0]->chip_idx);
 
        if(!can_request_mem_region(candev->io_addr, IO_RANGE, DEVICE_NAME )) {
                CANMSG("hmsc30c7202_can failed to request mem region %lx.\n",
@@ -94,7 +94,7 @@ int hms30c7202_release_io(struct candevice_t *candev)
        u16 tempReg;
        
        //disable IRQ generation
-       tempReg = hms30c7202_read_reg_w(candev->chip[0], CCCR);
+       tempReg = c_can_read_reg_w(candev->chip[0], CCCR);
 
        c_can_config_irqs(candev->chip[0], 0);
        
@@ -155,7 +155,7 @@ int hms30c7202_reset(  struct candevice_t *candev)
        
        /* Check busoff status */
        
-       while ( (hms30c7202_read_reg_w(pchip, CCSR) & SR_BOFF) && (i<=15)) {
+       while ( (c_can_read_reg_w(pchip, CCSR) & SR_BOFF) && (i<=15)) {
                udelay(20000);
                i++;
        }
@@ -273,14 +273,6 @@ int hms30c7202_init_hw_data(struct candevice_t *candev)
        candev->nr_sja1000_chips=0;
        candev->nr_all_chips=NR_C_CAN;
 
-       // Register hardware operations
-       candev->hwspecops->request_io = hms30c7202_request_io;
-       candev->hwspecops->release_io = hms30c7202_release_io;
-       candev->hwspecops->reset = hms30c7202_reset;
-       /* private register read and write routines used */
-       candev->hwspecops->write_register = NULL; /*hms30c7202_write_register;*/
-       candev->hwspecops->read_register = NULL; /*hms30c7202_read_register;*/
-
        return 0;
 }
 
@@ -338,7 +330,7 @@ int hms30c7202_init_chip_data(struct candevice_t *candev, int chipnr)
 int hms30c7202_init_obj_data(struct chip_t *chip, int objnr)
 {
 
-       DEBUGMSG("(c%d)calling hms30c7202_init_obj_data( ...)\n", pchip->chip_nr);
+       DEBUGMSG("(c%d)calling hms30c7202_init_obj_data( ...)\n", chip->chip_idx);
 
        /* It seems, that there is no purpose to setup object base address */
        chip->msgobj[objnr]->obj_base_addr=0;
@@ -359,17 +351,16 @@ int hms30c7202_init_obj_data(struct chip_t *chip, int objnr)
  * File: src/template.c
  */
 
-void hms30c7202_write_reg_w(const struct chip_t *pchip, u16 data, unsigned reg)
+void hms30c7202_write_register(unsigned data, unsigned long address)
 {
-   int i;
-   u32 address = pchip->chip_base_addr + reg;
+       int i;
        //unsigned long usecs = 1;
-
-   //DEBUGMSG("Trying to write 0x%u16x to address 0x%lx\n",data,address);
-
-   writew(data,address);
+       
+       //DEBUGMSG("Trying to write 0x%u16x to address 0x%lx\n",data,address);
+       
+       writew(data,address);
        //udelay( usecs );
-   for (i=0; i<5; i++);
+       for (i=0; i<5; i++);
 }
 
 /**
@@ -382,23 +373,21 @@ void hms30c7202_write_reg_w(const struct chip_t *pchip, u16 data, unsigned reg)
  * Return Value: The function returns the value stored in @address
  * File: src/template.c
  */
-u16 hms30c7202_read_reg_w(const struct chip_t *pchip, unsigned reg)
+unsigned hms30c7202_read_register(unsigned long address)
 {
-   u16 value, i;
-   u32 address = pchip->chip_base_addr + reg;
-       //unsigned long usecs = 1;
-
-   //DEBUGMSG("Trying to read from address 0x%lx :",address);
-
-   value = readw(address);
-   //udelay( usecs );
-   for (i=0;i<5;i++);
-   value = readw(address);
+       u16 value, i;
+       
+       //DEBUGMSG("Trying to read from address 0x%lx :",address);
+       
+       value = readw(address);
        //udelay( usecs );
-   for (i=0;i<5;i++);
-
-   //DEBUGMSG("0x%u16x\n",value);
-   return value;
+       for (i=0;i<5;i++);
+       value = readw(address);
+               //udelay( usecs );
+       for (i=0;i<5;i++);
+       
+       //DEBUGMSG("0x%u16x\n",value);
+       return value;
 
 }
 
@@ -427,9 +416,8 @@ int hms30c7202_register(struct hwspecops_t *hwspecops)
        hwspecops->init_hw_data = hms30c7202_init_hw_data;
        hwspecops->init_chip_data = hms30c7202_init_chip_data;
        hwspecops->init_obj_data = hms30c7202_init_obj_data;
-       /* private register read and write routines used */
-       hwspecops->write_register = NULL; /*hms30c7202_write_register;*/
-       hwspecops->read_register = NULL; /*hms30c7202_read_register;*/
+       hwspecops->write_register = hms30c7202_write_register;
+       hwspecops->read_register = hms30c7202_read_register;
        hwspecops->program_irq = hms30c7202_program_irq;
        return 0;
 }