* Rewritten for new CAN queues by Pavel Pisa - OCERA team member
* email:pisa@cmp.felk.cvut.cz
* This software is released under the GPL-License.
- * Version lincan-0.2 9 Jul 2003
+ * Version lincan-0.3 17 Jun 2004
*/
#include "../include/can.h"
int nsican_irq=-1;
unsigned long nsican_base=0x0;
+static can_spinlock_t nsican_port_lock=SPIN_LOCK_UNLOCKED;
+
/* IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
* #define IO_RANGE 0x20 for sja1000 chips.
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
- chip->msgobj[objnr]->flags=0;
return 0;
}
* on the CAN chip. You should only have to edit this function if your hardware
* uses some specific write process.
*/
-void nsi_write_register(unsigned char data, unsigned long address)
+void nsi_write_register(unsigned data, unsigned long address)
{
/* address is an absolute address */
We use the two register, we write the address where we
want to read in a first time. In a second time we read the
data */
- unsigned char ret;
+ unsigned char ret;
+ can_spin_irqflags_t flags;
- disable_irq(nsican_irq);
- outb(address-nsican_base, nsican_base);
- ret=inb(nsican_base+1);
- enable_irq(nsican_irq);
- return ret;
+ can_spin_lock_irqsave(&nsican_port_lock,flags);
+ outb(address-nsican_base, nsican_base);
+ ret=inb(nsican_base+1);
+ can_spin_unlock_irqrestore(&nsican_port_lock,flags);
+ return ret;
}