The first round of I/O space pointers separation.

[lincan.git] / lincan / src / nsi.c

diff --git a/lincan/src/nsi.c b/lincan/src/nsi.c
index aeef3925f94edadd86046965193ec81841a73929..06d38e1e2aa968179d90306e1ec555e9b6918a94 100644 (file)
--- a/lincan/src/nsi.c
+++ b/lincan/src/nsi.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 #include "../include/can.h"
@@ -16,6 +16,8 @@
 int nsican_irq=-1;
 unsigned long nsican_base=0x0;
 
+static CAN_DEFINE_SPINLOCK(nsican_port_lock);
+
 /* IO_RANGE is the io-memory range that gets reserved, please adjust according
  * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
  * #define IO_RANGE 0x20 for sja1000 chips.
@@ -62,8 +64,8 @@ int nsi_reset(struct candevice_t *candev)
     DEBUGMSG("Resetting nsi hardware ...\n");
     /* we don't use template_write_register because we don't use the two first
        register of the card but the third in order to make a hard reset */
-    outb (1, nsican_base + candev->res_addr);
-    outb (0, nsican_base + candev->res_addr);
+    can_outb (1, nsican_base + candev->res_addr);
+    can_outb (0, nsican_base + candev->res_addr);
     for (i = 1; i < 1000; i++)
        udelay (1000);
     
@@ -117,13 +119,12 @@ int nsi_init_hw_data(struct candevice_t *candev)
  * argument supplied at module loading time.
  * The clock argument holds the chip clock value in Hz.
  */
-#define CHIP_TYPE "i82527"
 
 int nsi_init_chip_data(struct candevice_t *candev, int chipnr)
 {
-       candev->chip[chipnr]->chip_type=CHIP_TYPE;
+       i82527_fill_chipspecops(candev->chip[chipnr]);
        candev->chip[chipnr]->chip_base_addr=
-           candev->io_addr;
+           can_ioport2ioptr(candev->io_addr);
        candev->chip[chipnr]->clock = 16000000;
        nsican_irq=candev->chip[chipnr]->chip_irq;      
         nsican_base=candev->chip[chipnr]->chip_base_addr;
@@ -144,12 +145,11 @@ int nsi_init_chip_data(struct candevice_t *candev, int chipnr)
  * base address.
  * Unless the hardware uses a segmented memory map, flags can be set zero.
  */
-int nsi_init_obj_data(struct chip_t *chip, int objnr)
+int nsi_init_obj_data(struct canchip_t *chip, int objnr)
 {
 
        chip->msgobj[objnr]->obj_base_addr=
            chip->chip_base_addr+(objnr+1)*0x10;
-       chip->msgobj[objnr]->flags=0;
        
        return 0;
 }
@@ -169,7 +169,7 @@ int nsi_program_irq(struct candevice_t *candev)
  * on the CAN chip. You should only have to edit this function if your hardware
  * uses some specific write process.
  */
-void nsi_write_register(unsigned char data, unsigned long address)
+void nsi_write_register(unsigned data, can_ioptr_t address)
 {
     /* address is an absolute address */
 
@@ -178,26 +178,27 @@ void nsi_write_register(unsigned char data, unsigned long address)
 
     /* write the relative address on the eight LSB bits 
        and the data on the eight MSB bits in one time */
-    outw(address-nsican_base + (256 * data), nsican_base); 
+    can_outw(address-nsican_base + (256 * data), nsican_base); 
 }
 
 /* The function template_read_register is used to read from hardware registers
  * on the CAN chip. You should only have to edit this function if your hardware
  * uses some specific read process.
  */
-unsigned nsi_read_register(unsigned long address)
+unsigned nsi_read_register(can_ioptr_t address)
 {
     /* this is the same thing that the function write_register.
        We use the two register, we write the address where we 
        want to read in a first time. In a second time we read the
        data */
-    unsigned char ret;
+       unsigned char ret;
+       can_spin_irqflags_t flags;
     
-    disable_irq(nsican_irq); 
-    outb(address-nsican_base, nsican_base);
-    ret=inb(nsican_base+1);
-    enable_irq(nsican_irq); 
-    return ret;
+       can_spin_lock_irqsave(&nsican_port_lock,flags);
+       can_outb(address-nsican_base, nsican_base);
+       ret=can_inb(nsican_base+1);
+       can_spin_unlock_irqrestore(&nsican_port_lock,flags);
+       return ret;
 }