+ if (filt.flags&MSG_EXT) {
+ id=filt.id<<3;
+ canobj_write_reg(chip,obj,id,iMSGID3);
+ canobj_write_reg(chip,obj,id>>8,iMSGID2);
+ canobj_write_reg(chip,obj,id>>16,iMSGID1);
+ canobj_write_reg(chip,obj,id>>24,iMSGID0);
+ canobj_write_reg(chip,obj,MCFG_XTD,iMSGCFG);
+ }
+ else {
+ id=filt.id<<5;
+ canobj_write_reg(chip,obj,id,iMSGID1);
+ canobj_write_reg(chip,obj,id>>8,iMSGID0);
+ canobj_write_reg(chip,obj,0x00,iMSGCFG);
+ }
+
+ canobj_write_reg(chip,obj,(NEWD_RES|MLST_RES|TXRQ_RES|RMPD_RES), iMSGCTL1);
+ canobj_write_reg(chip,obj,(MVAL_SET|TXIE_RES|RXIE_SET|INTPD_RES),iMSGCTL0);
+
+ CANMSG("i82527_irq_update_filter: obj at 0x%08lx\n",obj->obj_base_addr);
+
+ }
+}
+
+
+void i82527_irq_sync_activities(struct chip_t *chip, struct msgobj_t *obj)
+{
+ while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {