+static int mscan_abort_msg(struct canchip_t * chip, reg_t buffer_mask);
+
+#if MPC5200_DBG
+ static void dump_regs(struct canchip_t * chip)
+ {
+ CANMSG("MSCAN reg dump\n");
+ CANMSG("CTL0 0x%02x\tCTL1 0x%02x\tBTR0 0x%02x\tBTR1 0x%02x\n",
+ mscan_get_flags(chip, 0xff, MSCAN_CTL0),
+ mscan_get_flags(chip, 0xff, MSCAN_CTL1),
+ mscan_get_flags(chip, 0xff, MSCAN_BTR0),
+ mscan_get_flags(chip, 0xff, MSCAN_BTR1));
+
+ CANMSG("RFLG 0x%02x\tRIER 0x%02x\tTFLG 0x%02x\tTIER 0x%02x\n",
+ mscan_get_flags(chip, 0xff, MSCAN_RFLG),
+ mscan_get_flags(chip, 0xff, MSCAN_RIER),
+ mscan_get_flags(chip, 0xff, MSCAN_TFLG),
+ mscan_get_flags(chip, 0xff, MSCAN_TIER));
+
+ CANMSG("TARQ 0x%02x\tTAAK 0x%02x\tTBSEL 0x%02x\tIDAC 0x%02x\n",
+ mscan_get_flags(chip, 0xff, MSCAN_TARQ),
+ mscan_get_flags(chip, 0xff, MSCAN_TAAK),
+ mscan_get_flags(chip, 0xff, MSCAN_TBSEL),
+ mscan_get_flags(chip, 0xff, MSCAN_IDAC));
+
+ CANMSG("RXERR 0x%02x\tTXERR 0x%02x\n",
+ mscan_get_flags(chip, 0xff, MSCAN_RXERR),
+ mscan_get_flags(chip, 0xff, MSCAN_TXERR));
+
+ }
+
+ static void dump_buff(struct canchip_t * chip, unsigned offset_addr)
+ {
+ volatile struct mscan_msg_buffer * buff = (struct mscan_msg_buffer *)(chip->chip_base_addr + offset_addr);
+
+ CANMSG("MSCAN buffer dump\n");
+
+ /* structural access */
+ CANMSG("Data0 0x%02x Data1 0x%02x Data2 0x%02x Data3 0x%02x Data4 0x%02x Data5 0x%02x Data6 0x%02x Data7 0x%02x\n",
+ buff->data_0, buff->data_1, buff->data_2, buff->data_3, buff->data_4, buff->data_5, buff->data_6, buff->data_7);
+ CANMSG("Data Len %d\tPriority 0x%02x\n",
+ buff->data_len, buff->local_prio);
+ CANMSG("IDR0 0x%02x\tIDR1 0x%02x\tIDR2 0x%02x\tIDR3 0x%02x\n",
+ buff->id_0, buff->id_1, buff->id_2, buff->id_3);
+
+ }
+
+ static void dump_filter(struct canchip_t * chip)
+ {
+ volatile struct mscan_flt_regs * flt = (struct mscan_flt_regs *)(chip->chip_base_addr + MSCAN_IDAR0);
+
+ CANMSG("MSCAN Acceptance filter dump\n");
+
+ CANMSG("IDAC 0x%02x\n", mscan_get_flags(chip, MSCAN_IDAC_IDAM | MSCAN_IDAC_IDHIT, MSCAN_IDAC));
+
+ CANMSG("IDAR0 0x%02x\tIDAR1 0x%02x\tIDAR2 0x%02x\tIDAR3 0x%02x\n",
+ flt->acp_id_0, flt->acp_id_1, flt->acp_id_2, flt->acp_id_3);
+ CANMSG("IDMR0 0x%02x\tIDMR1 0x%02x\tIDMR2 0x%02x\tIDMR3 0x%02x\n",
+ flt->acp_mask_0, flt->acp_mask_1, flt->acp_mask_2, flt->acp_mask_3);
+
+ CANMSG("IDAR4 0x%02x\tIDAR5 0x%02x\tIDAR6 0x%02x\tIDAR7 0x%02x\n",
+ flt->acp_id_4, flt->acp_id_5, flt->acp_id_6, flt->acp_id_7);
+ CANMSG("IDMR4 0x%02x\tIDMR5 0x%02x\tIDMR6 0x%02x\tIDMR7 0x%02x\n",
+ flt->acp_mask_4, flt->acp_mask_5, flt->acp_mask_6, flt->acp_mask_7);
+ }
+#endif /* MPC5200_DBG */
+
+
+/* macro for standardized CAN Bus Status change report */
+#define MSCAN_STAT_CHANGE(msg,idx) CANMSG("MSCAN chip %d %s\n", idx, msg)