--- /dev/null
+#ifndef MCP2515_H
+#define MCP2515_H
+/* mcp2515.h
+ * Header file for the Linux CAN-bus driver.
+ * Written by Sergei Sharonov sharonov@halliburton.com
+ * sja1000p was used as a prototype
+ * This software is released under the GPL-License.
+ * Version lincan-0.3 Feb 2006
+ */
+
+// Fixup for old kernels - always defined for 2.6
+#ifndef container_of
+#define container_of(ptr, type, member) ({ \
+ const typeof( ((type *)0)->member ) *__mptr = (ptr); \
+ (type *)( (char *)__mptr - offsetof(type,member) );})
+#endif
+
+
+int mcp2515_chip_config(struct canchip_t *chip);
+int mcp2515_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask);
+int mcp2515_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
+ int sampl_pt, int flags);
+int mcp2515_pre_read_config(struct canchip_t *chip, struct msgobj_t *obj);
+int mcp2515_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
+ struct canmsg_t *msg);
+int mcp2515_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
+ struct canmsg_t *msg);
+int mcp2515_fill_chipspecops(struct canchip_t *chip);
+int mcp2515_irq_handler(int irq, struct canchip_t *chip);
+
+int mcp2515_disp(char *buf, char **start, off_t offset,
+ int count, int *eof, void *data);
+
+
+
+typedef struct {
+ uint8_t sidh;
+ uint8_t sidl;
+ uint8_t eid8;
+ uint8_t eid0;
+ uint8_t dlc;
+ uint8_t data[8];
+} __attribute__((packed)) MCP2515_FRAME;
+
+#define SPI_BUF_LEN 16 /* 13+2 bytes max transfer len, 1 spare */
+
+typedef struct {
+ uint32_t rx1ovr;
+ uint32_t rx0ovr;
+ uint32_t txbo;
+ uint32_t txep;
+ uint32_t rxep;
+ uint32_t txwar;
+ uint32_t rxwar;
+ uint32_t ewarn;
+ uint32_t merre;
+} MCP2515_ERRCNT;
+
+#define MCP2515_STATUS_SHUTDOWN (1)
+
+typedef struct {
+ struct canchip_t *chip;
+ uint8_t status;
+ uint8_t spi_buf[SPI_BUF_LEN];
+ struct work_struct workqueue_handler;
+ struct tasklet_struct tasklet_handler;
+ MCP2515_ERRCNT errcnt;
+ uint32_t wakeint_cnt;
+} MCP2515_PRIV;
+
+
+
+/* PeliCAN mode */
+enum MCP2515_regs {
+ /// TXBnCTRL - TRANSMIT BUFFER n CONTROL REGISTERS
+ MCP2515_TXB0CTRL = 0x30,
+ MCP2515_TXB1CTRL = 0x40,
+ MCP2515_TXB2CTRL = 0x50,
+
+ /// TXRTSCTRL - TXnRTS PIN CONTROL AND STATUS REGISTER
+ MCP2515_TXRTSCTRL = 0x0d,
+
+ /// TXBnSIDH - TRANSMIT BUFFER n STANDARD IDENTIFIER HIGH
+ MCP2515_TXB0SIDH = 0x31,
+ MCP2515_TXB1SIDH = 0x41,
+ MCP2515_TXB2SIDH = 0x51,
+
+ /// TXBnSIDL - TRANSMIT BUFFER n STANDARD IDENTIFIER LOW
+ MCP2515_TXB0SIDL = 0x32,
+ MCP2515_TXB1SIDL = 0x42,
+ MCP2515_TXB2SIDL = 0x52,
+
+ /// TXBnEID8 - TRANSMIT BUFFER n EXTENDED IDENTIFIER HIGH
+ MCP2515_TXB0EID8 = 0x33,
+ MCP2515_TXB1EID8 = 0x43,
+ MCP2515_TXB2EID8 = 0x53,
+
+ /// TXBnEID0 - TRANSMIT BUFFER n EXTENDED IDENTIFIER LOW
+ MCP2515_TXB0EID0 = 0x34,
+ MCP2515_TXB1EID0 = 0x44,
+ MCP2515_TXB2EID0 = 0x54,
+
+ /// TXBnDLC - TRANSMIT BUFFER n DATA LENGTH CODE
+ MCP2515_TXB0DLC = 0x35,
+ MCP2515_TXB1DLC = 0x45,
+ MCP2515_TXB2DLC = 0x55,
+
+ /// TXBnDm - TRANSMIT BUFFER n DATA
+ MCP2515_TXB0DATA = 0x36, /* 0x36-0x3d */
+ MCP2515_TXB1DATA = 0x46, /* 0x46-0x4d */
+ MCP2515_TXB2DATA = 0x56, /* 0x56-0x5d */
+
+ /// RXB0CTRL - RECEIVE BUFFER CONTROL
+ MCP2515_RXB0CTRL = 0x60,
+ MCP2515_RXB1CTRL = 0x70,
+
+ /// BFPCTRL - RXnBF PIN CONTROL AND STATUS
+ MCP2515_BFPCTRL = 0x0c,
+
+ /// RXBnSIDH - RECEIVE BUFFER n STANDARD IDENTIFIER HIGH
+ MCP2515_RXB0SIDH = 0x61,
+ MCP2515_RXB1SIDH = 0x71,
+
+ /// RXBnSIDL - RECEIVE BUFFER n STANDARD IDENTIFIER LOW
+ MCP2515_RXB0SIDL = 0x62,
+ MCP2515_RXB1SIDL = 0x72,
+
+ /// RXBnEID8 - RECEIVE BUFFER n EXTENDED IDENTIFIER HIGH
+ MCP2515_RXB0EID8 = 63,
+ MCP2515_RXB1EID8 = 73,
+
+ /// RXBnEID0 - RECEIVE BUFFER n EXTENDED IDENTIFIER LOW
+ MCP2515_RXB0EID0 = 64,
+ MCP2515_RXB1EID0 = 74,
+
+ /// RXBnDLC - RECEIVE BUFFER n DATA LENGHT CODE
+ MCP2515_RXB0DLC = 65,
+ MCP2515_RXB1DLC = 75,
+
+ /// RXBnDM - RECEIVE BUFFER n DATA
+ MCP2515_RXB0DATA = 0x66, /* 0x66-0x6d */
+ MCP2515_RXB1DATA = 0x76, /* 0x76-0x7d */
+
+ /// RXFnSIDH - FILTER n STANDARD IDENTIFIER HIGH
+ MCP2515_RXF0SIDH = 0x00,
+ MCP2515_RXF1SIDH = 0x04,
+ MCP2515_RXF2SIDH = 0x08,
+ MCP2515_RXF3SIDH = 0x10,
+ MCP2515_RXF4SIDH = 0x14,
+ MCP2515_RXF5SIDH = 0x18,
+
+ /// RXFnSIDL - FILTER n STANDARD IDENTIFIER LOW
+ MCP2515_RXF0SIDL = 0x01,
+ MCP2515_RXF1SIDL = 0x05,
+ MCP2515_RXF2SIDL = 0x09,
+ MCP2515_RXF3SIDL = 0x11,
+ MCP2515_RXF4SIDL = 0x15,
+ MCP2515_RXF5SIDL = 0x19,
+
+ /// RXFnEID8 - FILTER n EXTENDED IDENTIFIER HIGH
+ MCP2515_RXF0EID8 = 0x02,
+ MCP2515_RXF1EID8 = 0x06,
+ MCP2515_RXF2EID8 = 0x0a,
+ MCP2515_RXF3EID8 = 0x12,
+ MCP2515_RXF4EID8 = 0x16,
+ MCP2515_RXF5EID8 = 0x1a,
+
+ /// RXFnEID0 - FILTER n EXTENDED IDENTIFIER LOW
+ MCP2515_RXF0EID0 = 0x03,
+ MCP2515_RXF1EID0 = 0x07,
+ MCP2515_RXF2EID0 = 0x0b,
+ MCP2515_RXF3EID0 = 0x13,
+ MCP2515_RXF4EID0 = 0x17,
+ MCP2515_RXF5EID0 = 0x1b,
+
+ /// RXMnSIDH - MASK n STANDARD IDENTIFIER HIGH
+ MCP2515_RXM0SIDH = 0x20,
+ MCP2515_RXM1SIDH = 0x24,
+
+ /// RXMnSIDL - MASK n STANDARD IDENTIFIER LOW
+ MCP2515_RXM0SIDL = 0x21,
+ MCP2515_RXM1SIDL = 0x25,
+
+ /// RXMnEID8 - MASK n EXTENDED IDENTIFIER HIGH
+ MCP2515_RXM0EID8 = 0x22,
+ MCP2515_RXM1EID8 = 0x26,
+
+ /// RXMnEID0 - MASK n EXTENDED IDENTIFIER LOW
+ MCP2515_RXM0EID0 = 0x23,
+ MCP2515_RXM1EID0 = 0x27,
+
+ /// CNFn - CONFIGURATION REGS
+ MCP2515_CNF1 = 0x2a,
+ MCP2515_CNF2 = 0x29,
+ MCP2515_CNF3 = 0x28,
+
+ /// TEC - TRANSMIT ERROR COUNTER
+ MCP2515_TEC = 0x1c,
+
+ /// REC - RECEIVER ERROR COUNTER
+ MCP2515_REC = 0x1d,
+
+ /// EFLG - ERROR FLAG
+ MCP2515_EFLG = 0x2d,
+
+ /// CANINTE - INTERRUPT ENABLE
+ MCP2515_CANINTE = 0x2b,
+
+ /// CANINTF - INTERRUPT FLAG
+ MCP2515_CANINTF = 0x2c,
+
+ /// CANCTRL - CAN CONTROL REGISTER
+ MCP2515_CANCTRL = 0x0f,
+
+ /// CANSTAT - CAN STATUS REGISTER
+ MCP2515_CANSTAT = 0x0e
+};
+
+
+/** Mode Register Bits */
+enum mcp2515_MOD {
+ mcpMOD_NORM = 0<<5, // Normal Operation Mode
+ mcpMOD_SLEEP = 1<<5, // Sleep Mode
+ mcpMOD_LOOPBACK = 2<<5, // Loopback Mode
+ mcpMOD_LISTEN = 3<<5, // Listen-only Mode
+ mcpMOD_CONFIG = 4<<5, // Configuration Mode
+ mcpMOD_MASK = 7<<5 // Mask for mod bits
+};
+
+/* BFPCTRL - RXnBF PIN CONTROL AND STATUS */
+enum mcp2515_RXBF {
+ mcpB0BFE = 1<<2,
+ mcpB1BFE = 1<<3,
+ mcpB0BFS = 1<<4,
+ mcpB1BFS = 1<<5
+};
+
+/* RXBnSIDL bits */
+enum mcp2515_RXBSIDL {
+ mcpIDE = 1 << 3,
+ mcpSRR = 1 << 4
+};
+
+/* RXBnDLC bits */
+enum mcp2515_RXBDLC {
+ mcpDLC_MASK = 0x0f,
+ mcpRTR = 1 << 6
+};
+
+/* RXB0CTRL */
+enum mcp2515_RXB0CTRL {
+ mcpFILHIT0 = 1 << 0,
+ mcpBUKT = 1 << 2,
+ mcpRXRTR = 1 << 3,
+ mcpRXM_MASK = 3 << 5
+};
+
+enum mcp2515_ICOD {
+ mcpICOD_RXB0 = 7,
+ mcpICOD_RXB1 = 6,
+ mcpICOD_TXB2 = 5,
+ mcpICOD_TXB1 = 4,
+ mcpICOD_TXB0 = 3,
+ mcpICOD_WAKE = 2,
+ mcpICOD_ERR = 1
+};
+
+enum mcp2515_TXBCTRL {
+ mcpTXREQ = 1 << 3,
+ mcpTXERR = 1 << 4,
+ mcpMLOA = 1 << 5,
+ mcpABTF = 1 << 6
+};
+
+enum mcp2515_TXBSIDL {
+ mcpEXIDE = 1 << 3,
+ mcpEID_MASK = 0x3
+};
+
+enum mcp2515_INT {
+ mcpRX0INT = 1 << 0,
+ mcpRX1INT = 1 << 1,
+ mcpTX0INT = 1 << 2,
+ mcpTX1INT = 1 << 3,
+ mcpTX2INT = 1 << 4,
+ mcpERRINT = 1 << 5,
+ mcpWAKINT = 1 << 6,
+ mcpMERREINT = 1 << 7
+};
+
+/* Error flags EFLG */
+enum mcp2515_EFLG {
+ mcpEWARN = 1 << 0,
+ mcpRXWAR = 1 << 1,
+ mcpTXWAR = 1 << 2,
+ mcpRXEP = 1 << 3,
+ mcpTXEP = 1 << 4,
+ mcpTXBO = 1 << 5,
+ mcpRX0OVR = 1 << 6,
+ mcpRX1OVR = 1 << 7
+};
+
+#endif
projects / lincan.git / blobdiff