Merge branch 'master' into can-usb1

[lincan.git] / lincan / src / pcccan.c

diff --git a/lincan/src/pcccan.c b/lincan/src/pcccan.c
index 64e6b700a9fd55c4cc9831d4222d0fbce5c9f1ed..a8c0b19715cb2c2cd4dfa4cef63bb2efb2bad5d9 100644 (file)
--- a/lincan/src/pcccan.c
+++ b/lincan/src/pcccan.c
@@ -4,7 +4,7 @@
  * Rewritten for new CAN queues by Pavel Pisa - OCERA team member
  * email:pisa@cmp.felk.cvut.cz
  * This software is released under the GPL-License.
- * Version lincan-0.2  9 Jul 2003
+ * Version lincan-0.3  17 Jun 2004
  */ 
 
 /* This file contains the low level functions for the pcccan-1 card from Gespac.
@@ -20,6 +20,8 @@
 int pcccan_irq=-1;
 unsigned long pcccan_base=0x0;
 
+static CAN_DEFINE_SPINLOCK(pcccan_port_lock);
+
 /*
  * IO_RANGE is the io-memory range that gets reserved, please adjust according
  * your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
@@ -101,13 +103,13 @@ int pcccan_reset(struct candevice_t *candev)
        DEBUGMSG("Resetting pcccan-1 hardware ...\n");
        while (i < 1000000) {
                i++;
-               outb(0x0,candev->res_addr);
+               can_outb(0x0,candev->res_addr);
        }
 
        /* Check hardware reset status */
        i=0;
-       outb(iCPU,candev->io_addr+0x1);
-       while ( (inb(candev->io_addr+0x2)&0x80) && (i<=15) ) {
+       can_outb(iCPU,candev->io_addr+0x1);
+       while ( (can_inb(candev->io_addr+0x2)&0x80) && (i<=15) ) {
                udelay(20000);
                i++;
        }
@@ -150,7 +152,6 @@ int pcccan_init_hw_data(struct candevice_t *candev)
        return 0;
 }
 
-#define CHIP_TYPE "i82527"
 /**
  * pcccan_init_chip_data - Initialize chips
  * @candev: Pointer to candevice/board structure
@@ -166,11 +167,11 @@ int pcccan_init_hw_data(struct candevice_t *candev)
  * The @clock entry holds the chip clock value in Hz.
  * The entry @sja_cdr_reg holds hardware specific options for the Clock Divider
  * register. Options defined in the %sja1000.h file:
- * %CDR_CLKOUT_MASK, %CDR_CLK_OFF, %CDR_RXINPEN, %CDR_CBP, %CDR_PELICAN
+ * %sjaCDR_CLKOUT_MASK, %sjaCDR_CLK_OFF, %sjaCDR_RXINPEN, %sjaCDR_CBP, %sjaCDR_PELICAN
  * The entry @sja_ocr_reg holds hardware specific options for the Output Control
  * register. Options defined in the %sja1000.h file:
- * %OCR_MODE_BIPHASE, %OCR_MODE_TEST, %OCR_MODE_NORMAL, %OCR_MODE_CLOCK,
- * %OCR_TX0_LH, %OCR_TX1_ZZ.
+ * %sjaOCR_MODE_BIPHASE, %sjaOCR_MODE_TEST, %sjaOCR_MODE_NORMAL, %sjaOCR_MODE_CLOCK,
+ * %sjaOCR_TX0_LH, %sjaOCR_TX1_ZZ.
  * The entry @int_clk_reg holds hardware specific options for the Clock Out
  * register. Options defined in the %i82527.h file:
  * %iCLK_CD0, %iCLK_CD1, %iCLK_CD2, %iCLK_CD3, %iCLK_SL0, %iCLK_SL1.
@@ -185,8 +186,8 @@ int pcccan_init_hw_data(struct candevice_t *candev)
  */
 int pcccan_init_chip_data(struct candevice_t *candev, int chipnr)
 {
-       candev->chip[chipnr]->chip_type=CHIP_TYPE;
-       candev->chip[chipnr]->chip_base_addr=candev->io_addr;
+       i82527_fill_chipspecops(candev->chip[chipnr]);
+       candev->chip[chipnr]->chip_base_addr=can_ioport2ioptr(candev->io_addr);
        candev->chip[chipnr]->clock = 16000000;
        candev->chip[chipnr]->int_cpu_reg = iCPU_DSC | iCPU_DMC;
        candev->chip[chipnr]->int_clk_reg = iCLK_SL1 | iCLK_CD0;
@@ -216,7 +217,7 @@ int pcccan_init_chip_data(struct candevice_t *candev, int chipnr)
  * Return Value: The function always returns zero
  * File: src/pcccan.c
  */
-int pcccan_init_obj_data(struct chip_t *chip, int objnr)
+int pcccan_init_obj_data(struct canchip_t *chip, int objnr)
 {
        chip->msgobj[objnr]->obj_base_addr=(objnr+1)*0x10;
        
@@ -251,12 +252,13 @@ int pcccan_program_irq(struct candevice_t *candev)
  * Return Value: The function does not return a value
  * File: src/pcccan.c
  */
-void pcccan_write_register(unsigned char data, unsigned long address)
+void pcccan_write_register(unsigned data, can_ioptr_t address)
 {
-       can_disable_irq(pcccan_irq);
-       outb(address - pcccan_base, pcccan_base+1);
-       outb(data, pcccan_base+6);
-       can_enable_irq(pcccan_irq);
+       can_spin_irqflags_t flags;
+       can_spin_lock_irqsave(&pcccan_port_lock,flags);
+       can_outb(address - pcccan_base, pcccan_base+1);
+       can_outb(data, pcccan_base+6);
+       can_spin_unlock_irqrestore(&pcccan_port_lock,flags);
 }
 
 /**
@@ -269,13 +271,14 @@ void pcccan_write_register(unsigned char data, unsigned long address)
  * Return Value: The function returns the value stored in @address
  * File: src/pcccan.c
  */
-unsigned pcccan_read_register(unsigned long address)
+unsigned pcccan_read_register(can_ioptr_t address)
 {
        unsigned ret;
-       can_disable_irq(pcccan_irq);
-       outb(address - pcccan_base, pcccan_base+1);
-       ret=inb(pcccan_base+2);
-       can_enable_irq(pcccan_irq);
+       can_spin_irqflags_t flags;
+       can_spin_lock_irqsave(&pcccan_port_lock,flags);
+       can_outb(address - pcccan_base, pcccan_base+1);
+       ret=can_inb(pcccan_base+2);
+       can_spin_unlock_irqrestore(&pcccan_port_lock,flags);
        return ret;
 
 }