Some bugs related with bit timing fixed.

[lincan.git] / embedded / app / usbcan / lpc17xx_can.c

diff --git a/embedded/app/usbcan/lpc17xx_can.c b/embedded/app/usbcan/lpc17xx_can.c
index 8b3a773839fdc7319df5cd02af899997050107ca..7cd0f56abd2aae3980b6a4491b184a08177837ec 100644 (file)
--- a/embedded/app/usbcan/lpc17xx_can.c
+++ b/embedded/app/usbcan/lpc17xx_can.c
@@ -3,6 +3,8 @@
 static void CAN_configPin();
 static void CAN_setBusTiming(struct canchip_t *chip);
 
+#define MAX_TRANSMIT_WAIT_LOOPS 20
+
 //---------------------------------------------------------------------------------
 //---------------------------------------------------------------------------------
 
@@ -102,10 +104,20 @@ int lpc17xx_pre_write_config(struct canchip_t *chip, struct msgobj_t *obj,
 int lpc17xx_send_msg(struct canchip_t *chip, struct msgobj_t *obj,
                                                        struct canmsg_t *msg)
 {
-       
+       uint32_t i=0;   
+
        // write transmission request
        can_write_reg(chip, (CAN_CMR_TR | CAN_CMR_STB1), CAN_CMR_o); 
 
+       while (!(can_read_reg(chip, CAN_SR_o) & (1<<3))){
+               if(i++<MAX_TRANSMIT_WAIT_LOOPS)
+                       continue;
+
+               // request command to abort transmission request
+               can_write_reg(chip, CAN_CMR_AT, CAN_CMR_o);
+               break;
+       }
+
        return 0;
 }
 
@@ -186,6 +198,7 @@ void lpc17xx_irq_write_handler(struct canchip_t *chip, struct msgobj_t *obj)
 {
        int cmd;
 
+
        if(obj->tx_slot){
                /* Do local transmitted message distribution if enabled */
                if (processlocal){
@@ -357,14 +370,22 @@ void CAN_recv(struct canchip_t *chip, canmsg_t* msg){
 
 }
 
+
 void CAN_send(struct canchip_t *chip, canmsg_t* msg){
 
        volatile uint32_t data;
        volatile uint32_t can_tfi1;
-       uint32_t i;
+       uint32_t i=0;
 
        // check status of TB1
-       while (!(can_read_reg(chip, CAN_SR_o) & CAN_SR_TBS1)){} 
+       while (!(can_read_reg(chip, CAN_SR_o) & CAN_SR_TBS1)){
+               if(i++<MAX_TRANSMIT_WAIT_LOOPS)
+                       continue;
+
+               // request command to abort transmission request
+               can_write_reg(chip, CAN_CMR_AT, CAN_CMR_o);
+               return;
+       }       
 
        can_tfi1 = can_read_reg(chip, CAN_TFI1_o);
 
@@ -406,6 +427,29 @@ void CAN_send(struct canchip_t *chip, canmsg_t* msg){
 
 }
 
+void CAN_set_bittiming(struct canchip_t *chip, uint32_t brp, uint32_t sjw, uint32_t tseg1, uint32_t tseg2){
+
+       uint8_t SAM = 0; // 0 = the bus is sampled once
+
+       brp--;
+       sjw--;
+       tseg1--;
+       tseg2--;
+
+       can_disable_irq(chip->chip_irq);
+       // enter reset mode
+       can_write_reg(chip, 1, CAN_MOD_o);
+
+
+       can_write_reg(chip, ((SAM<<23)|(tseg2<<20)|(tseg1<<16)|(sjw<<14)|(brp<<0)), CAN_BTR_o);
+
+
+       // return to normal operating 
+       can_write_reg(chip, 0, CAN_MOD_o);
+
+       can_enable_irq(chip->chip_irq);
+}
+
 void CAN_setBusTiming(struct canchip_t *chip){
 
        uint32_t PCLK_CAN;