-/* ssv.c
- * Linux CAN-bus device driver.
- * Written by Arnaud Westenberg email:arnaud@casema.net
- * This software is released under the GPL-License.
- * Version lincan-0.3 17 Jun 2004
- */
+/**************************************************************************/
+/* File: ssv.c - SSV board support */
+/* */
+/* LinCAN - (Not only) Linux CAN bus driver */
+/* Copyright (C) 2002-2009 DCE FEE CTU Prague <http://dce.felk.cvut.cz> */
+/* Copyright (C) 2002-2009 Pavel Pisa <pisa@cmp.felk.cvut.cz> */
+/* Funded by OCERA and FRESCOR IST projects */
+/* Based on CAN driver code by Arnaud Westenberg <arnaud@wanadoo.nl> */
+/* */
+/* LinCAN is free software; you can redistribute it and/or modify it */
+/* under terms of the GNU General Public License as published by the */
+/* Free Software Foundation; either version 2, or (at your option) any */
+/* later version. LinCAN is distributed in the hope that it will be */
+/* useful, but WITHOUT ANY WARRANTY; without even the implied warranty */
+/* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU */
+/* General Public License for more details. You should have received a */
+/* copy of the GNU General Public License along with LinCAN; see file */
+/* COPYING. If not, write to the Free Software Foundation, 675 Mass Ave, */
+/* Cambridge, MA 02139, USA. */
+/* */
+/* To allow use of LinCAN in the compact embedded systems firmware */
+/* and RT-executives (RTEMS for example), main authors agree with next */
+/* special exception: */
+/* */
+/* Including LinCAN header files in a file, instantiating LinCAN generics */
+/* or templates, or linking other files with LinCAN objects to produce */
+/* an application image/executable, does not by itself cause the */
+/* resulting application image/executable to be covered by */
+/* the GNU General Public License. */
+/* This exception does not however invalidate any other reasons */
+/* why the executable file might be covered by the GNU Public License. */
+/* Publication of enhanced or derived LinCAN files is required although. */
+/**************************************************************************/
#include "../include/can.h"
#include "../include/can_sysdep.h"
#include "../include/i82527.h"
int ssvcan_irq[2]={-1,-1};
-unsigned long ssvcan_base=0x0;
+can_ioptr_t ssvcan_base=0x0;
-static can_spinlock_t ssv_port_lock=SPIN_LOCK_UNLOCKED;
+static CAN_DEFINE_SPINLOCK(ssv_port_lock);
/* IO_RANGE is the io-memory range that gets reserved, please adjust according
* your hardware. Example: #define IO_RANGE 0x100 for i82527 chips or
CANMSG("Unable to open port: 0x%lx\n",candev->io_addr);
return -ENODEV;
} else {
- DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
+ DEBUGMSG("Registered IO-memory: 0x%lx - 0x%lx\n", candev->io_addr,
candev->io_addr + IO_RANGE - 1);
}
return 0;
}
-/* The function template_release_io is used to free the previously reserved
+/* The function template_release_io is used to free the previously reserved
* io-memory. In case you reserved more memory, don't forget to free it here.
*/
int ssv_release_io(struct candevice_t *candev)
*/
int ssv_reset(struct candevice_t *candev)
{
- int i;
+ int i;
DEBUGMSG("Resetting ssv hardware ...\n");
ssv_write_register(1,ssvcan_base+iCPU);
for (i = 1; i < 1000; i++)
udelay (1000);
- /* Check hardware reset status */
+ /* Check hardware reset status */
i=0;
while ( (ssv_read_register(ssvcan_base+iCPU) & iCPU_RST) && (i<=15)) {
- udelay(20000);
+ mdelay(20);
i++;
}
if (i>=15) {
else
DEBUGMSG("Chip0 reset status ok.\n");
- /* Check hardware reset status */
+ /* Check hardware reset status */
i=0;
while ( (ssv_read_register(ssvcan_base+0x100+iCPU) & iCPU_RST) && (i<=15)) {
- udelay(20000);
+ mdelay(20);
i++;
}
if (i>=15) {
#define NR_82527 2
#define NR_SJA1000 0
-int ssv_init_hw_data(struct candevice_t *candev)
+int ssv_init_hw_data(struct candevice_t *candev)
{
candev->res_addr=RESET_ADDR;
candev->nr_82527_chips=NR_82527;
* argument supplied at module loading time.
* The clock argument holds the chip clock value in Hz.
*/
-#define CHIP_TYPE "i82527"
-
int ssv_init_chip_data(struct candevice_t *candev, int chipnr)
{
- candev->chip[chipnr]->chip_type=CHIP_TYPE;
+ i82527_fill_chipspecops(candev->chip[chipnr]);
candev->chip[chipnr]->chip_base_addr=
- candev->io_addr+0x100*chipnr;
+ can_ioport2ioptr(candev->io_addr+0x100*chipnr);
candev->chip[chipnr]->clock = 16000000;
ssvcan_irq[chipnr]=candev->chip[chipnr]->chip_irq;
* CAN chip. In case of the sja1000 there's only one message object but on the
* i82527 chip there are 15.
* The code below is for a i82527 chip and initializes the object base addresses
- * The entry obj_base_addr represents the first memory address of the message
+ * The entry obj_base_addr represents the first memory address of the message
* object. In case of the sja1000 obj_base_addr is taken the same as the chips
* base address.
* Unless the hardware uses a segmented memory map, flags can be set zero.
*/
-int ssv_init_obj_data(struct chip_t *chip, int objnr)
+int ssv_init_obj_data(struct canchip_t *chip, int objnr)
{
chip->msgobj[objnr]->obj_base_addr=
chip->chip_base_addr+(objnr+1)*0x10;
-
+
return 0;
}
* on the CAN chip. You should only have to edit this function if your hardware
* uses some specific write process.
*/
-void ssv_write_register(unsigned data, unsigned long address)
+void ssv_write_register(unsigned data, can_ioptr_t address)
{
/* address is an absolute address */
/* the ssv card has two registers, the address register at 0x0
and the data register at 0x01 */
- /* write the relative address on the eight LSB bits
+ /* write the relative address on the eight LSB bits
and the data on the eight MSB bits in one time */
if((address-ssvcan_base)<0x100)
- outw(address-ssvcan_base + (256 * data), ssvcan_base);
+ can_outw(address-ssvcan_base + (256 * data), ssvcan_base);
else
- outw(address-ssvcan_base-0x100 + (256 * data), ssvcan_base+0x02);
+ can_outw(address-ssvcan_base-0x100 + (256 * data), ssvcan_base+0x02);
}
/* The function template_read_register is used to read from hardware registers
* on the CAN chip. You should only have to edit this function if your hardware
* uses some specific read process.
*/
-unsigned ssv_read_register(unsigned long address)
+unsigned ssv_read_register(can_ioptr_t address)
{
/* this is the same thing that the function write_register.
- We use the two register, we write the address where we
+ We use the two register, we write the address where we
want to read in a first time. In a second time we read the
data */
unsigned char ret;
can_spin_irqflags_t flags;
-
+
if((address-ssvcan_base)<0x100)
{
can_spin_lock_irqsave(&ssv_port_lock,flags);
- outb(address-ssvcan_base, ssvcan_base);
- ret=inb(ssvcan_base+1);
+ can_outb(address-ssvcan_base, ssvcan_base);
+ ret=can_inb(ssvcan_base+1);
can_spin_unlock_irqrestore(&ssv_port_lock,flags);
}
else
{
can_spin_lock_irqsave(&ssv_port_lock,flags);
- outb(address-ssvcan_base-0x100, ssvcan_base+0x02);
- ret=inb(ssvcan_base+1+0x02);
+ can_outb(address-ssvcan_base-0x100, ssvcan_base+0x02);
+ ret=can_inb(ssvcan_base+1+0x02);
can_spin_unlock_irqrestore(&ssv_port_lock,flags);
}
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