// prototypes
-inline void c_can_irq_read_handler( struct chip_t *pchip, int idxobj, u32 msgid );
+inline void c_can_irq_read_handler( struct canchip_t *pchip, int idxobj, u32 msgid );
-inline void c_can_irq_write_handler( struct chip_t *pchip, int idxobj);
+inline void c_can_irq_write_handler( struct canchip_t *pchip, int idxobj);
-void c_can_irq_rtr_handler( struct chip_t *pchip, int idxobj, u32 msgid );
+void c_can_irq_rtr_handler( struct canchip_t *pchip, int idxobj, u32 msgid );
u16 readMaskCM = IFXCM_ARB | IFXCM_CNTRL | IFXCM_CLRINTPND
| IFXCM_TRND | IFXCM_DA | IFXCM_DB;
// Send a message from the output fifo ( if any ).
//
-inline void c_can_irq_write_handler( struct chip_t *pchip, int idxobj)
+inline void c_can_irq_write_handler( struct canchip_t *pchip, int idxobj)
{
int cmd;
struct msgobj_t *pmsgobj = pchip->msgobj[idxobj];
if(pmsgobj->tx_slot){
/* Do local transmitted message distribution if enabled */
if (processlocal){
+ /* fill CAN message timestamp */
+ can_filltimestamp(&pmsgobj->tx_slot->msg.timestamp);
+
pmsgobj->tx_slot->msg.flags |= MSG_LOCAL;
canque_filter_msg2edges(pmsgobj->qends, &pmsgobj->tx_slot->msg);
}
// Message received form the line. Write it in the input fifo->
//
-inline void c_can_irq_read_handler( struct chip_t *pchip,
+inline void c_can_irq_read_handler( struct canchip_t *pchip,
int idxobj, u32 msgid )
{
int i=0;
for ( i=0; i < pmsgobj->rx_msg.length; i++ )
DEBUGMSG(" data[%d] = 0x%.2x\n", i, pmsgobj->rx_msg.data[i]);
+ /* fill CAN message timestamp */
+ can_filltimestamp(&pmsgobj->rx_msg.timestamp);
+
canque_filter_msg2edges(pmsgobj->qends, &pmsgobj->rx_msg);
#ifdef CAN_WITH_STATISTICS
// while
}
-void c_can_irq_sync_activities(struct chip_t *chip, struct msgobj_t *obj)
+void c_can_irq_sync_activities(struct canchip_t *chip, struct msgobj_t *obj)
{
while(!can_msgobj_test_and_set_fl(obj,TX_LOCK)) {
// c_can_irq_handler
//
-can_irqreturn_t c_can_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
+int c_can_irq_handler(int irq, struct canchip_t *chip)
{
struct rtr_id *rtr_search = hardware_p->rtr_queue;
- struct chip_t *pchip = (struct chip_t *)dev_id;
u16 chip_status;
int id0=0, id1=0;
u16 errcount = 0;
DEBUGMSG( "\n(c%d)IRQ handler: addr=%.8lx spurious interrupt\n",
pchip->chip_idx,
(long)( pchip->/*v*/chip_base_addr/* + CCSR*/));
- return CAN_IRQ_NONE;
+ return CANCHIP_IRQ_NONE;
}
DEBUGMSG( "\n(c%d)IRQ handler: addr=%.8lx irqreg=0x%.4x\n",
// Get irq status again
irqreg = c_can_read_reg_w( pchip, CCINTR );
}
- return CAN_IRQ_HANDLED;
+ return CANCHIP_IRQ_HANDLED;
}
///////////////////////////////////////////////////////////////////////////////
// c_can_irq_rtr_handler
//
-void c_can_irq_rtr_handler( struct chip_t *pchip, int idxobj, u32 msgid )
+void c_can_irq_rtr_handler( struct canchip_t *pchip, int idxobj, u32 msgid )
{
short int i=0;
struct rtr_id *prtr_search = hardware_p->rtr_queue;