Added prefix sja to all sjaXX_YY register bit-fields definitions.

[lincan.git] / lincan / src / pccan.c

diff --git a/lincan/src/pccan.c b/lincan/src/pccan.c
index 57dcd3c01ae5fc5e042e4f45d0d2d26003b94583..49ec50bf6b02ba255d0328fa9bc0e10382f378ac 100644 (file)
--- a/lincan/src/pccan.c
+++ b/lincan/src/pccan.c
@@ -115,7 +115,7 @@ int pccanf_reset(struct candevice_t *candev)
 
        /* Check hardware reset status */
        i=0;
 
        /* Check hardware reset status */
        i=0;

-       while ( (inb(candev->chip[0]->chip_base_addr+SJACR) & CR_RR)
+       while ( (inb(candev->chip[0]->chip_base_addr+SJACR) & sjaCR_RR)

                                                                 && (i<=15) ) {
                udelay(20000);
                i++;
                                                                 && (i<=15) ) {
                udelay(20000);
                i++;


@@ -149,7 +149,7 @@ int pccand_reset(struct candevice_t *candev)
        for (chip_nr=0; chip_nr<2; chip_nr++) {
                i=0;
                while ( (inb(candev->chip[chip_nr]->chip_base_addr +
        for (chip_nr=0; chip_nr<2; chip_nr++) {
                i=0;
                while ( (inb(candev->chip[chip_nr]->chip_base_addr +

-                                               SJACR) & CR_RR) && (i<=15) ) {
+                                               SJACR) & sjaCR_RR) && (i<=15) ) {

                        udelay(20000);
                        i++;
                }
                        udelay(20000);
                        i++;
                }


@@ -200,7 +200,7 @@ int pccanq_reset(struct candevice_t *candev)
        for (chip_nr=2; chip_nr<4; chip_nr++) {
                i=0;
                while( (inb(candev->chip[chip_nr]->chip_base_addr +
        for (chip_nr=2; chip_nr<4; chip_nr++) {
                i=0;
                while( (inb(candev->chip[chip_nr]->chip_base_addr +

-                                               SJACR) & CR_RR) && (i<=15) ) {
+                                               SJACR) & sjaCR_RR) && (i<=15) ) {

                        udelay(20000);
                        i++;
                }
                        udelay(20000);
                        i++;
                }


@@ -263,9 +263,9 @@ int pccan_init_chip_data(struct candevice_t *candev, int chipnr)
                        candev->chip[chipnr]->int_clk_reg = 0;
                        candev->chip[chipnr]->int_bus_reg = 0;
                        candev->chip[chipnr]->sja_cdr_reg =
                        candev->chip[chipnr]->int_clk_reg = 0;
                        candev->chip[chipnr]->int_bus_reg = 0;
                        candev->chip[chipnr]->sja_cdr_reg =

-                                                               CDR_CLK_OFF;
+                                                               sjaCDR_CLK_OFF;

                        candev->chip[chipnr]->sja_ocr_reg = 
                        candev->chip[chipnr]->sja_ocr_reg = 

-                                               OCR_MODE_NORMAL | OCR_TX0_LH;   
+                                               sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;     

                }
                candev->chip[chipnr]->chip_base_addr=0x1000*chipnr+0x2000+candev->io_addr;
        }
                }
                candev->chip[chipnr]->chip_base_addr=0x1000*chipnr+0x2000+candev->io_addr;
        }


@@ -276,9 +276,9 @@ int pccan_init_chip_data(struct candevice_t *candev, int chipnr)
                candev->chip[chipnr]->int_cpu_reg = 0;
                candev->chip[chipnr]->int_clk_reg = 0;
                candev->chip[chipnr]->int_bus_reg = 0;
                candev->chip[chipnr]->int_cpu_reg = 0;
                candev->chip[chipnr]->int_clk_reg = 0;
                candev->chip[chipnr]->int_bus_reg = 0;

-               candev->chip[chipnr]->sja_cdr_reg = CDR_CLK_OFF;
+               candev->chip[chipnr]->sja_cdr_reg = sjaCDR_CLK_OFF;

                candev->chip[chipnr]->sja_ocr_reg = 
                candev->chip[chipnr]->sja_ocr_reg = 

-                                               OCR_MODE_NORMAL | OCR_TX0_LH;   
+                                               sjaOCR_MODE_NORMAL | sjaOCR_TX0_LH;     

        }
 
        candev->chip[chipnr]->clock = 16000000;
        }
 
        candev->chip[chipnr]->clock = 16000000;