can_quesysless.c remains to be fixed (tasklets and sleeping)

[lincan.git] / embedded / app / usbcan / can / sja1000p.h

diff --git a/embedded/app/usbcan/can/sja1000p.h b/embedded/app/usbcan/can/sja1000p.h
index 1aa09236629d683918b9e5a7d7f2d0aab1126d51..fe81a9c4522a2c7565417cb390be5513d10420ba 100644 (file)
--- a/embedded/app/usbcan/can/sja1000p.h
+++ b/embedded/app/usbcan/can/sja1000p.h
@@ -2,13 +2,16 @@
  * Header file for the Linux CAN-bus driver.
  * Written by Arnaud Westenberg email:arnaud@wanadoo.nl
  * Added by T.Motylewski@bfad.de
- * See app. note an97076.pdf from Philips Semiconductors 
+ * See app. note an97076.pdf from Philips Semiconductors
  * and SJA1000 data sheet
  * PELICAN mode
  * This software is released under the GPL-License.
  * Version lincan-0.3  17 Jun 2004
  */
 
+#ifndef SJA1000P_H
+#define SJA1000P_H
+
 int sja1000p_chip_config(struct canchip_t *chip);
 int sja1000p_extended_mask(struct canchip_t *chip, unsigned long code, unsigned long mask);
 int sja1000p_baud_rate(struct canchip_t *chip, int rate, int clock, int sjw,
@@ -57,7 +60,7 @@ enum SJA1000_PeliCAN_regs {
 /// Transmit Buffer (write) Receive Buffer (read) Frame Information
        SJAFRM = 0x10,
 /// ID bytes (11 bits in 0 and 1 or 16 bits in 0,1 and 13 bits in 2,3 (extended))
-       SJAID0 = 0x11, SJAID1 = 0x12, 
+       SJAID0 = 0x11, SJAID1 = 0x12,
 /// ID cont. for extended frames
        SJAID2 = 0x13, SJAID3 = 0x14,
 /// Data start standard frame
@@ -69,7 +72,7 @@ enum SJA1000_PeliCAN_regs {
 /// Acceptance Mask (4 bytes) in RESET mode
        SJAAMR0 = 0x14,
 /// 4 bytes
-       SJA_PeliCAN_AC_LEN = 4, 
+       SJA_PeliCAN_AC_LEN = 4,
 /// Clock Divider
        SJACDR = 0x1f
 };
@@ -84,7 +87,7 @@ enum sja1000_PeliCAN_MOD {
 };
 
 /** Command Register 0x01 */
-enum sja1000_PeliCAN_CMR { 
+enum sja1000_PeliCAN_CMR {
        sjaCMR_SRR= 1<<4,  // Self Reception Request (GoToSleep in BASIC mode)
        sjaCMR_CDO= 1<<3,  // Clear Data Overrun
        sjaCMR_RRB= 1<<2,  // Release Receive Buffer
@@ -114,7 +117,7 @@ enum sja1000_PeliCAN_IER {
        sjaIER_RIE = 1,    // Receive Interrupt Enable
        sjaENABLE_INTERRUPTS = sjaIER_BEIE|sjaIER_EPIE|sjaIER_DOIE|sjaIER_EIE|sjaIER_TIE|sjaIER_RIE,
        sjaDISABLE_INTERRUPTS = 0
-// WARNING: the chip automatically enters RESET (bus off) mode when 
+// WARNING: the chip automatically enters RESET (bus off) mode when
        // error counter > 255
 };
 
@@ -198,3 +201,5 @@ enum sja1000_CDR {
 
 /** flags for sja1000_baud_rate */
 #define BTR1_SAM (1<<1)
+
+#endif /* SJA1000P_H */